- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄376462 > XRT75R12 (Exar Corporation) TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR PDF資料下載
參數(shù)資料
| 型號(hào)： | XRT75R12 |
| 廠商： | Exar Corporation |
| 英文描述： | TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| 中文描述： | 第十二章通道E3/DS3/STS-1線路接口單元與抖動(dòng)衰減器 |
| 文件頁(yè)數(shù)： | 75/89頁(yè) |
| 文件大?。?/td> | 457K |
| 代理商： | XRT75R12 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)當(dāng)前第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)
PRELIMINARY
XRT75R12
REV. P1.0.2
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
72
3
FL Alarm Declared
R/O
FL (FIFO Limit) Alarm Declared:
This READ-ONLY bit-field indicates whether or not the Jitter Attenuator
block (within Channel_n) is currently declaring the FIFO Limit Alarm.
The Jitter Attenuator block will declare the FIFO Limit Alarm anytime
the Jitter Attenuator FIFO comes within two bit-periods of either over-
flowing or under-running.
Conversely, the Jitter Attenuator block will clear the FIFO Limit Alarm
anytime the Jitter Attenuator FIFO is NO longer within two bit-periods
of either overflowing or under-running.
Typically, this Alarm will only be declared whenever there is a very seri-
ous problem with timing or jitter in the system.
0 - Indicates that the Jitter Attenuator block (within Channel_n) is NOT
currently declaring the FIFO Limit Alarm condition.
1 - Indicates that the Jitter Attenuator block (within Channel_n) is cur-
rently declaring the FIFO Limit Alarm condition.
N
OTE
:
This bit-field is only active if the Jitter Attenuator (within
Channel_n) has been enabled.
2
Receive LOL Con-
dition Declared
R/O
Receive LOL (Loss of Lock) Condition Declared:
This READ-ONLY bit-field indicates whether or not the Receive Sec-
tion (within Channel_n) is currently declaring the LOL (Loss of Lock)
condition.
The Receive Section (of Channel_n) will declare the LOL Condition, if
the frequency of the Recovered Clock signal differs from that of the ref-
erence clock programmed for that channel (from the appropriate oscil-
lator or the SFM clock synthesizer if in that mode) by 0.5% (or
5000ppm) or more .
0 - Indicates that the Receive Section of Channel_n is NOT currently
declaring the LOL Condition.
1 - Indicates that the Receive Section of Channel_n is currently declar-
ing the LOL Condition and the recovered clock differs by more than
0.5%..
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT75R12IB | TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00 | E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00IV | E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT79L71 | 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L71IB | 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75R12_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75R12_0710 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75R12D | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET |
| XRT75R12D_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET |
| XRT75R12D_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。