
XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.2
III
T
ABLE
22: T
HE
ABOVE
IS
: C
HANNEL
L
EVEL
I
NTERRUPT
S
TATUS
R
EGISTER
- CR97 (A
DDRESS
L
OCATION
= 0
X
61).................................. 63
T
ABLE
23: C
HANNEL
L
EVEL
I
NTERRUPT
S
TATUS
R
EGISTER
- CR225 (A
DDRESS
L
OCATION
= 0
X
E1)....................................................... 63
T
ABLE
24: D
EVICE
/P
ART
N
UMBER
R
EGISTER
- CR110 (A
DDRESS
L
OCATION
= 0
X
6E) ........................................................................... 64
T
ABLE
25: C
HIP
R
EVISION
N
UMBER
R
EGISTER
- CR111 (A
DDRESS
L
OCATION
= 0
X
6F) ......................................................................... 64
THE PER-CHANNEL REGISTERS........................................................................................................................... 65
REGISTER DESCRIPTION - PER CHANNEL REGISTERS....................................................................................66
T
ABLE
26: XRT75R12 R
EGISTER
MAP
SHOWING
I
NTERRUPT
E
NABLE
R
EGISTERS
(IER_
N
).................................................................. 66
T
ABLE
27: S
OURCE
L
EVEL
I
NTERRUPT
E
NABLE
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
1 .................................................... 66
T
ABLE
28: XRT75R12 R
EGISTER
MAP
SHOWING
I
NTERRUPT
S
TATUS
R
EGISTERS
(ISR_
N
).................................................................. 68
T
ABLE
29: S
OURCE
L
EVEL
I
NTERRUPT
S
TATUS
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
2 .................................................... 68
T
ABLE
30: XRT75R12 R
EGISTER
MAP
SHOWING
A
LARM
S
TATUS
R
EGISTERS
(AS_
N
).......................................................................... 70
T
ABLE
31: A
LARM
S
TATUS
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
3................................................................................... 70
T
ABLE
32: XRT75R12 R
EGISTER
MAP
SHOWING
T
RANSMIT
C
ONTROL
R
EGISTERS
(TC_
N
)................................................................... 74
T
ABLE
33: T
RANSMIT
C
ONTROL
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
4 ........................................................................... 74
T
ABLE
34: XRT75R12 R
EGISTER
MAP
SHOWING
R
ECEIVE
C
ONTROL
R
EGISTERS
(RC_
N
) .................................................................... 76
T
ABLE
35: R
ECEIVE
C
ONTROL
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
5 ............................................................................. 76
T
ABLE
36: XRT75R12 R
EGISTER
MAP
SHOWING
C
HANNEL
C
ONTROL
R
EGISTERS
(CC_
N
)................................................................... 77
T
ABLE
37: C
HANNEL
C
ONTROL
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
6............................................................................ 77
T
ABLE
38: XRT75R12 R
EGISTER
MAP
SHOWING
J
ITTER
A
TTENUATOR
C
ONTROL
R
EGISTERS
(JA_
N
) ................................................... 80
T
ABLE
39: J
ITTER
A
TTENUATOR
C
ONTROL
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
7 ........................................................... 80
T
ABLE
40: XRT75R12 R
EGISTER
MAP
SHOWING
E
RROR
C
OUNTER
MSB
YTE
R
EGISTERS
(EM_
N
)........................................................ 81
T
ABLE
41: E
RROR
C
OUNTER
MSB
YTE
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
A................................................................. 81
T
ABLE
42: XRT75R12 R
EGISTER
MAP
SHOWING
E
RROR
C
OUNTER
LSB
YTE
R
EGISTERS
(EL_
N
).......................................................... 82
T
ABLE
43: E
RROR
C
OUNTER
LSB
YTE
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
B.................................................................. 82
T
ABLE
44: XRT75R12 R
EGISTER
MAP
SHOWING
E
RROR
C
OUNTER
H
OLDING
R
EGISTERS
(EH_
N
)........................................................ 82
T
ABLE
45: E
RROR
C
OUNTER
H
OLDING
R
EGISTER
- C
HANNEL
N
A
DDRESS
L
OCATION
= 0
XM
C................................................................ 83
8.0 ELECTRICAL CHARACTERISTICS ...................................................................................................84
T
ABLE
46: A
BSOLUTE
M
AXIMUM
R
ATINGS
............................................................................................................................................. 84
T
ABLE
47: DC E
LECTRICAL
C
HARACTERISTICS
:..................................................................................................................................... 84
ORDERING INFORMATION ..................................................................................................................85
P
ACKAGE
D
IMENSIONS
-.............................................................................................................................................. 85
R
EVISIONS
..................................................................................................................................................................86