參數(shù)資料
型號: XRT75R03DIV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封裝: 14 X 20 MM, LQFP-128
文件頁數(shù): 89/134頁
文件大?。?/td> 803K
代理商: XRT75R03DIV
XRT75R03D
REV. 1.0.2
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
84
3
JA RESET Ch_n
R/W
0
Jitter Attenuator RESET - Channel_n:
Writing a "0 to 1" transition within this bit-field will configure
the Jitter Attenuator (within Channel_n) to execute a
RESET operation.
Whenever the user executes a RESET operation, then all
of the following will occur.
The READ and WRITE pointers (within the Jitter
Attenuator FIFO) will be reset to their default values.
The contents of the Jitter Attenuator FIFO will be
flushed.
N
OTE
:
The user must follow up any "0 to 1" transition with
the appropriate write operate to set this bit-field
back to "0", in order to resume normal operation
with the Jitter Attenuator.
2
JA1 Ch_n
R/W
0
Jitter Attenuator Configuration Select Input - Bit 1:
This READ/WRITE bit-field, along with Bit 0 (JA0 Ch_n) is
used to do any of the following.
To enable or disable the Jitter Attenuator corresponding
to Channel_n.
To select the FIFO Depth for the Jitter Attenuator within
Channel_n.
The relationship between the settings of these two bit-
fields and the Enable/Disable States, and FIFO Depths is
presented below.
1
JA in Tx Path Ch_n
R/W
0
Jitter Attenuator in Transmit/Receive Path Select Bit:
This input pin is used to configure the Jitter Attenuator
(within Channel_n) to operate in either the Transmit or
Receive path, as described below.
0 - Configures the Jitter Attenuator (within Channel_n) to
operate in the Receive Path.
1 - Configures the Jitter Attenuator (within Channel_n) to
operate in the Transmit Path.
0
JA0 Ch_n
R/W
0
Jitter Attenuator Configuration Select Input - Bit 0:
Please see the description for Bit 2 (JA1 Ch_n).
B
IT
N
UMBER
N
AME
T
YPE
D
EFAULT
V
ALUE
D
ESCRIPTION
JA0
JA1
Jitter Attenuator Mode
1
1
Jitter Attenuator Disabled
1
0
SONET/SDH De-Sync Mode
0
1
FIFO Depth = 32 bits
0
0
FIFO Depth = 16 bits
相關PDF資料
PDF描述
XRT75R03 THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R03IV THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R06D SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R06DIB SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R06 SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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XRT75R03DIV-F 功能描述:網(wǎng)絡控制器與處理器 IC 3-Ch E3/DS3/STS-1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT75R03DIVTR 功能描述:時鐘合成器/抖動清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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