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| 型號(hào)： | XRT75R03DIV-F |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 7/135頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| 標(biāo)準(zhǔn)包裝： | 72 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 3/3 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x20） |
| 包裝： | 托盤 |
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XRT75R03D
100
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
REV. 1.0.4
The Ideal Case (e.g., with no frequency offsets)
The 44.736Mbps + 1 ppm Case
The 44.736MHz - 1ppm Case
Throughout each of these cases, we will discuss how the resulting "bit-stuffing" (that was done when mapping
the DS3 signal into SONET) affects the amount of intrinsic jitter and wander that will be present in the DS3
signal, once it is ultimately de-mapped from SONET.
10.2.2.1
The Ideal Case for Mapping DS3 data into an STS-1 Signal (e.g., with no Frequency
Offsets)
Let us assume that we are mapping a DS3 signal, which has a bit rate of exactly 44.736Mbps (with no
frequency offset) into SONET. Further, let us assume that the SONET circuitry within the PTE is clocked at
exactly 51.84MHz (also with no frequency offset), as depicted below.
Given the above-mentioned assumptions, we can state the following.
The DS3 data-stream has a bit-rate of exactly 44.736Mbps
The PTE will create 8000 STS-1 SPE's per second
In order to properly map a DS3 data-stream into an STS-1 data-stream, then each STS-1 SPE must carry
(44.736Mbps/8000 =) 5592 DS3 data bits.
Is there a Problem?
According to Figure 38, each STS-1 SPE only contains 5589 bits that are specifically designated for "DS3 data
bits". In this case, each STS-1 SPE appears to be three bits "short".
No there is a Simple Solution
No, earlier we mentioned that each STS-1 SPE consists of nine (9) "Stuff Opportunity" bits. Therefore, these
three additional bits (for DS3 data) are obtained by using three of these "Stuff Opportunity" bits.
As a
consequence, three (3) of these nine (9) "Stuff Opportunity" bits, within each STS-1 SPE, will carry DS3 data-
bits. The remaining six (6) "Stuff Opportunity" bits will typically function as "stuff" bits.
In summary, for the "Ideal Case"; where there is no frequency offset between the DS3 and the STS-1 bit-rates,
once this DS3 data-stream has been mapped into the STS-1 data-stream, then each and every STS-1 SPE will
have the following "Stuff Opportunity" bit utilization.
3 "Stuff Opportunity" bits will carry DS3 data bits.
6 "Stuff Opportunity" bits will function as "stuff" bits
FIGURE 39. A SIMPLE ILLUSTRATION OF A DS3 DATA-STREAM BEING MAPPED INTO AN STS-1 SPE, VIA A PTE
PTE
44.736MHz + 0ppm
DS3_Data_In
STS-1_Data_Out
51.84MHz + 0ppm
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT75R03IV-F | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| XRT75R06DIB-F | IC LIU E3/DS3/STS-1 6CH 217BGA |
| XRT75R06IB-F | IC LIU E3/DS3/STS-1 6CH 217BGA |
| XRT75R12DIB-L | IC LIU E3/DS3/STS-1 12CH 420TBGA |
| XRT75R12IB-L | IC LIU E3/DS3/STS-1 12CH 420TBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75R03DIVTR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R03DIVTR-F | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| XRT75R03ES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CH T3/E3/STS1LIU+JA 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R03IV | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75R03IV-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3-Ch E3/DS3/STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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