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參數(shù)資料
| 型號(hào)： | XRT75L06DIB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PBGA217 |
| 封裝： | 23 X 23 MM, BGA-217 |
| 文件頁數(shù)： | 94/103頁 |
| 文件大?。?/td> | 679K |
| 代理商： | XRT75L06DIB |
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xr
REV. 1.0.4
XRT75L06D
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
90
HOW MAJOR PATTERN A IS SYNTHESIZED
MAJOR PATTERN A is created (by the Mapper IC) by:
Repeating MINOR PATTERN P1 (e.g., 7 clock pulses, followed by a gap) 63 times.
Upon completion of the 63rd transmission of MINOR PATTERN P1, MINOR PATTERN P2 is transmitted
repeatedly 36 times.
Figure 68 presents an illustration which depicts the procedure that is used to synthesize MAJOR PATTERN A
Hence, MAJOR PATTERN A consists of "(63 x 7) + (36 x 5)" = 621 clock pulses. These 621 clock pulses were
delivered over a period of "(63 x 8) + (36 x 6)" = 720 STS-1 (or 51.84MHz) clock periods.
MAJOR PATTERN B
MAJOR PATTERN B consists of three sub or minor-patterns (which we will refer to as "MINOR PATTERNS P1,
P2 and P3).
MINOR PATTERN P1, which is used to partially synthesize MAJOR PATTERN B, is exactly the same "MINOR
PATTERN P1" as was presented above in Figure 38. Similarly, the MINOR PATTERN P2, which is also used
to partially synthesize MAJOR PATTERN B, is exactly the same "MINOR PATTERN P2" as was presented in
Figure 39.
MINOR PATTERN P3 (which has yet to be defined) consists of a string of six (6) clock pulses, which contains
no gaps. An illustration of MINOR PATTERN P3 is presented below in Figure 69.
F
IGURE
67. I
LLUSTRATION
OF
MINOR PATTERN P2
F
IGURE
68. I
LLUSTRATION
OF
P
ROCEDURE
WHICH
IS
USED
TO
S
YNTHESIZE
MAJOR PATTERN A
1 2 3 4 5
Missing Clock Pulse
MINOR PATTERN P1
MINOR PATTERN P2
Repeats 63 Times
Repeats 36 Times
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT75L06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75L06IB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75R03D | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER |
| XRT75R03DIV | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER |
| XRT75R03 | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75L06DIB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 6-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75L06ES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 6 CHT3/E3/STS1 LIU+JA 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L06IB | 功能描述:接口 - 專用 6CH E3/DS3/STS1 LIU+Jitter Attenuato RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| XRT75L06IB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 6-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75R03 | 制造商:EXAR 制造商全稱:EXAR 功能描述:THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
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