參數(shù)資料
型號(hào): XRT75L02IV-F
廠商: Exar Corporation
文件頁數(shù): 26/50頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 2CH 100TQFP
標(biāo)準(zhǔn)包裝: 90
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 2/2
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
xr
XRT75L02
REV. 1.0.3
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
30
As defined in ITU-T G.775, an LOS condition is also declared between 10 and 255 UI (or E3 bit periods) after
the actual time the LOS condition has occurred. The LOS condition is cleared within 10 to 255 UI after
restoration of the incoming line signal. Figure 20 shows the LOS declaration and clearance conditions.
5.4.3
Muting the Recovered Data with LOS condition:
When the LOS condition is declared, the clock recovery circuit locks into the reference clock applied to the E3/
DS3/STS1CLK pin and output this clock on the RxClk_n output. In Single Frequency Mode (SFM), the clock
recovery locks into the rate clock generated and output this clock on the RxClk_n pins. The data on the
RPOS_n and RNEG_n pins can be forced to zero by pulling the LOSMUT pin “High” (in Hardware Mode) or by
setting the LOSMUT_n bits in the individual channel control register to “1” (in Host Mode).
NOTE: When the LOS condition is cleared, the recovered data is output on RPOS_n and RNEG_n pins.
FIGURE 19. LOSS OF SIGNAL DEFINITION FOR E3 AS PER ITU-T G.775
FIGURE 20. LOSS OF SIGNAL DEFINITION FOR E3 AS PER ITU-T G.775.
0 dB
-12 dB
-15dB
-35dB
Maximum Cable Loss for E3
LOS Signal Must be Declared
LOS Signal Must be Cleared
LOS Signal may be Cleared or Declared
Actual Occurrence
of LOS Condition
Line Signal
is Restored
Time Range for
LOS Declaration
Time Range for
LOS Clearance
G.775
Compliance
G.775
Compliance
0 UI
10 UI
0 UI
10 UI
255 UI
RTIP/
RRing
RLOS Output Pin
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