
XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
PRELIMINARY
REV. P1.0.1
378
the RxE3 Interrupt Enable Register - 2, as indicated
below.
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Servicing the Change in Receive FERF Condition
Interrupt
Whenever the XRT74L73 Framer IC detects this in-
terrupt, it will do all of the following.
It will assert the Interrupt Request output pin (INT),
by driving it “Low”.
It will set Bit 3 (FERF Interrupt Status), within the
Rx E3 Interrupt Status Register - 2 to “1”, as indi-
cated below.
Whenever the user’s system encounters the Change
in Receive FERF Condition Interrupt, then it should
do the following.
1.
It should determine the current state of the FERF
condition. Recall, that this interrupt can be gen-
erated, whenever the XRT74L73 Framer IC
declares or clears the FERF defect. Hence, the
user can determine the current state of the LOS
defect by reading the state of Bit 0 (RxFERF)
within the Rx E3 Configuration and Status Regis-
ter - 2, as illustrated below.
5.3.6.2.7
If the Detection of BIP-4 Error Interrupt is enabled,
then the XRT74L73 Framer IC will generate an inter-
rupt, anytime the Receive E3 Framer block has de-
The Detection of BIP-4 Error Interrupt
tected an error in the BIP-4 Nibble, within an incom-
ing E3 frame.
N
OTE
:
This interrupt is only active if the XRT74L73 Framer
IC has been configured to process the BIP-4 nibble within
each incoming and outbound E3 frame.
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Not Used
FERF
Interrupt
Enable
BIP-4 Error
Interrupt
Enable
Framing Error
Interrupt
Enable
Not Used
R/W
RO
RO
RO
R/W
R/W
R/W
RO
0
0
0
0
0
0
0
0
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Not Used
FERF
Interrupt
Status
BIP-4
Error
Interrupt
Status
Framing
Error
Interrupt
Status
Not Used
RO
RO
RO
RO
RUR
RUR
RUR
RUR
0
0
0
0
1
0
0
0
RXE3 CONFIGURATION & STATUS REGISTER - 2 (ADDRESS = 0X11)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
RxLOF
Algo
RxLOF
RxOOF
RxLOS
RxAIS
Not Used
RxFERF
R/W
RO
RO
RO
RO
RO
RO
RO
0
1
1
0
0
1
1
1