PIN
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� XRT73LC04AIV
寤犲晢锛� Exar Corporation
鏂囦欢闋佹暩(sh霉)锛� 4/64闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC LIU E3/DS3/STS-1 4CH 144LQFP
妯欐簴鍖呰锛� 60
椤炲瀷锛� 绶氳矾鎺ュ彛瑁濈疆锛圠IU锛�
椹呭嫊鍣�/鎺ユ敹鍣ㄦ暩(sh霉)锛� 4/4
瑕�(gu墨)绋嬶細 DS3锛孍3锛孲TS-1
闆绘簮闆诲锛� 3.135 V ~ 3.465 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 144-LQFP
渚涙噳鍟嗚ō鍌欏皝瑁濓細 144-LQFP锛�20x20锛�
鍖呰锛� 鎵樼洡
XRT73LC04A
8
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
OPERATING MODE SELECT
PIN #
NAME
TYPE
DESCRIPTION
69
SR/DR/CS
I
Microprocessor Serial Interface - Chip Select Input/Encoder-
Decoder Disable Input:
The function of this pin depends upon whether the XRT73LC04A is oper-
ating in the HOST Mode or in the Hardware Mode.
NOTE: This pin is internally pulled "High".
Hardware Mode - Receive Output Single-Rail/Dual-Rail Select:
In Hardware Mode, setting this pin 鈥淗igh鈥� configures each of the four
channels to operate in the Single-Rail Mode. When each of the four
channels are configured to operate in the Single-Rail Mode, then the
Receive Section of each channel will output data via the RPOS_(n) out-
put pin.
NOTE: Tie the TNData_(n) input to GND to enable HDB3/B3ZS Encod-
ing and Decoding.
Setting this pin 鈥淟ow鈥� configures each of the four channels to operate in
the Dual-Rail Mode. When each of the four channels are configured to
operate in the Dual-Rail Mode, then the Receive Section of each channel
will output data via both the RPOS_(n) and RNEG_(n) output pins.
NOTE: This input pin functions as the CS input pin, if the XRT73LC04A
device has been configured to operate in the HOST Mode.
72
71
108
107
E3_0/SDO
E3_1/SDI
E3_2
E3_3
I/O
I
E3_Mode Select - Channel 0:
This pin has a dual function. In HOST mode, this pin functions as SDO.
E3_Mode Select - Channel 1
This pin has a dual function. In HOST mode,this pin functions as SDI.
E3_Mode Select - Channel 2
E3_Mode Select - Channel 3
Hardware Mode Operation - E3 Mode Select - Channel (n):
This input pin is used to configure Channel (n) of the XRT73LC04A to
operate in the E3 or STS-1/DS3 Modes. Setting this input pin to "High"
configures Channel (n) to operate in the E3 Mode. Setting it "Low" con-
figures Channel (n) to operate in either the DS3 or STS-1 Modes,
depending upon the state of the STS-1/DS3_(n) input pin.
NOTE: This pin is internally pulled 鈥淟ow鈥� when XRT73LC04A is in the
Hardware Mode.
73
83
106
98
STS1/DS3_0
STS1/DS3_1
STS1/DS3_2
STS1/DS3_3
I
STS-1/DS3 Select Input - Channel (n):
鈥淗igh鈥� for STS-1 and 鈥淟ow鈥� for DS3 Operation.
The XRT73LC04A ignores this pin if the E3_(n) pin is set to "1".
This input pin is ignored if the XRT73LC04A is operating in the HOST
Mode.
NOTE: This pin should be tied to GND if the XRT73LC04A is going to be
operating in the HOST Mode, (internally pulled-down).
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鍙冩暩(sh霉)鎻忚堪
XRT73LC04AIV-F 鍔熻兘鎻忚堪:澶栧湇椹呭嫊鍣ㄨ垏鍘熶欢 - PCI 4-Ch DS3, E3, STS-1 RoHS:鍚� 鍒堕€犲晢:PLX Technology 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�: 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FCBGA-1156 灏佽:Tray
XRT73R06 鍒堕€犲晢:EXAR 鍒堕€犲晢鍏ㄧū:EXAR 鍔熻兘鎻忚堪:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73R06ES 鍔熻兘鎻忚堪:缍�(w菐ng)绲℃帶鍒跺櫒鑸囪檿鐞嗗櫒 IC RoHS:鍚� 鍒堕€犲晢:Micrel 鐢㈠搧:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray
XRT73R06IB 鍔熻兘鎻忚堪:澶栧湇椹呭嫊鍣ㄨ垏鍘熶欢 - PCI RoHS:鍚� 鍒堕€犲晢:PLX Technology 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�: 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FCBGA-1156 灏佽:Tray
XRT73R06IB-F 鍔熻兘鎻忚堪:澶栧湇椹呭嫊鍣ㄨ垏鍘熶欢 - PCI RoHS:鍚� 鍒堕€犲晢:PLX Technology 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�: 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FCBGA-1156 灏佽:Tray