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參數(shù)資料
| 型號： | XRT73LC00AIV |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 42/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU STS1/DS3/E3 SGL 44TQFP |
| 標準包裝： | 160 |
| 類型： | 線路接口裝置（LIU） |
| 驅動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應商設備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
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XRT73LC00A
44
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT
4.0
DIAGNOSTIC FEATURES OF THE XRT73LC00A
The XRT73LC00A supports equipment diagnostic activities by supporting the following Loop-Back modes in
the chip:
Analog Local Loop-Back
Digital Local Loop-Back
Remote Loop-Back.
4.1
The Analog Local Loop-Back Mode
When the XRT73LC00A is configured to operate in the Analog Local Loop-Back Mode, the XRT73LC00A
ignores any signals that are input to the RTIP and RRING input pins. The Transmitting Terminal Equipment
transmits clock and data into the XRT73LC00A via the TPDATA, TNDATA and TCLK input pins. This data is
processed through the Transmit Clock Duty Cycle Adjust PLL and the HDB3/B3ZS Encoder. Finally, this data
outputs to the line via the TTIP and TRING output pins and is looped back into the AGC/Receive Equalizer
Block. Consequently, this data is also processed through the Receive Section of the XRT73LC00A. After this
post-loop-back data has been processed through the Receive Section it outputs to the Near-End Receiving
Terminal Equipment via the RPOS, RNEG, RCLK1 and RCLK2 output pins.
Figure 29 illustrates the path that the data takes when the chip is configured to operate in the Analog Local
Loop-Back Mode.
The XRT73LC00A can be configured to operate in the Analog Local Loop-Back Mode by employing either one
of the following two steps:
FIGURE 27. THE TYPICAL INTERFACE FOR THE TRANSMISSION OF DATA IN A SINGLE-RAIL FORMAT FROM THE
RECEIVE SECTION OF THE XRT73LC00A TO THE RECEIVING TERMINAL EQUIPMENT
FIGURE 28. THE BEHAVIOR OF THE RPOS AND RCLK1 OUTPUT SIGNALS WHILE THE XRT73LC00A IS TRANSMIT-
TING
SINGLE-RAIL DATA TO THE RECEIVING TERMINAL EQUIPMENT
Terminal
Equipment
(E3/DS3 or STS-1
Framer)
Exar E3/DS3/STS-1 LIU
Receive
Logic
Block
RxPOS
RCLK1, 2
RPOS
RCLK1, 2
RCLK1
RPOS
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73LC00AIV-F | 功能描述:外圍驅動器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73LC00AIVTR | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00AIVTR-F | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
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