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參數(shù)資料
| 型號(hào)： | XRT72L73 |
| 廠商： | Exar Corporation |
| 元件分類(lèi)： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 26/105頁(yè) |
| 文件大?。?/td> | 1307K |
| 代理商： | XRT72L73 |
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XRT72L73
THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.1
á
PRELIMINARY
26
M2
M1
N3
TxSerData/
TxPOH_0
TxSerData/
TxPOH_1
TxSerData/
TxPOH_2
I
Transmit Serial Payload Data Input/Transmit PLCP Frame POH Byte Inser-
tion Serial Input:
The exact functionality of this output pin depends upon whether the XRT72L71
Framer IC is operating in the Clear Channel or ATM Uni Mode.
Clear Channel Mode:
In clear channel mode, this pin can be used by the external interface to provide the
serial input data (payload and OH) that has to be mapped in outgoing DS3 frame.
If user want to insert OH data on TxSer pin then the user should configure the
XRT72L71 accordingly.
ATM UNI Mode:
This input pin becomes active when the user asserts the TxPOHIns input pin.
When this happens the user will be permitted to serially input their own value for
PLCP POH bytes into the “outbound” PLCP frame. This data will be clocked into
the UNI Framer via the TxPOHClk output signal. This UNI will also assert the
TxPOHMSB output pin when it expects the MSB (Most significant bit) of the Z6
Byte (within the PLCP frame).
N1
N4
P3
TxPOHClk_0
TxPOHClk_1
TxPOHClk_2
O
Transmit PLCP Frame POH Byte Insertion Clock:
This pin, along with the TxPOH and the TxPOHMSB input pins, function as the
“Transmit PLCP Frame POH Byte” serial input port. This output pin functions as a
clock output signal that is used to sample the user’s POH data at the TxPOH input
pin. This output pin is always active, independent of the state of the “TxPOHIns”
pin.
N
OTE
:
This output pin is only active if the XRT72L73 has been configured to oper-
ate in the “ATM UNI” Mode.
L2
L1
L4
TxPOHFrame_0
TxPOHFrame_1
TxPOHFrame_2
O
Transmit PLCP Frame Path Overhead Byte Serial Input Port—Beginning of
Frame indicator.
This output pin, along with the TxPOH, TxPOHClk, and TxPOHIns pins comprise
the “Transmit PLCP Frame POH Byte Insertion” serial input port. This particular
pin will pulse “High” when the “Transmit PLCP POH Byte Insertion” serial input
port is expecting the first bit of the Z6 byte at the TxPOH input pin.
N
OTE
:
This output pin is only active if the XRT72L73 has been configured to oper-
ate in the “ATM UNI” Mode.
Transmit PLCP Frame POH Data Insert Enable:
This input can be asserted to allow the user to input his/her own value for the
PLCP POH bytes via the TxPOH input pin, in each PLCP frame, prior to transmis-
sion. If this input pin is not asserted, then the UNI will generate its own PLCP POH
bytes.
N
OTE
:
The user should tie this input pin to “GND” if the XRT72L73 is going to be
configured to operate in either the “Clear-Channel-Framer” Mode or in the “Direct-
Mapped ATM” Mode.
P1
R3
R2
TxPOHIns_0
TxPOHIns_1
TxPOHIns_2
I
Rx PLCP Processor
U25
U26
T24
RxOHInd/
RxPFrame_0
RxOHInd/
RxPFrame_1
RxOHInd/
RxPFrame_2
O
Receive Overhead Bit Indicator/PLCP Frame Boundary Indicator
Output—Receive PLCP Processor.
The exact functionality of this output pin depends upon whether the XRT72L71
UNI/Framer IC is operating in the Clear Channel or ATM Uni Mode.
Clear Channel Mode - RxOHInd:
In clear channel mode, this pin is pulsed “High” for one bit period whenever an over-
head bit is being output via the RxSerData output pin. In other words, the “RxSer-
Data” output pin will contain an over-head if this pin is sampled “High”.
ATM UNI Mode:
This output pin pulses “High” when the Receive PLCP Processor is receiving the last
bit of a given PLCP frame.
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT72L74 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT7300IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7302 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
| XRT73L02M | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT72L73IB | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Telecommunication IC |
| XRT72L74IB | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Telecommunication IC |
| XRT7300 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300ES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT7300IV | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI . . RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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