參數(shù)資料
型號: XRT72L71
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 97/104頁
文件大?。?/td> 1156K
代理商: XRT72L71
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
PRELIMINARY
REV. P1.0.5
97
Line Interface Scan register provides DS3UNI framer
chip capability to monitor status of line interface units.
Configuration in this register is connected directly to
the corresponding discrete I/O pins.
Note: These signals drive and scan the line interface
chip XRT7300.
T
ABLE
116:
L
INE
I
NTERFACE
S
CAN
R
EGISTER
R
EGISTER
115 L
INE
I
NTERFACE
S
CAN
R
EGISTER
H
EX
A
DDRESS
: 0
X
73
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-3
Unused
RO
0
2
DMO
RO
0
This “Read-Only” bit-field permits the user to determine the current state of
the “DMO” input pin. This input pin can be connected to the “DMO” output
pin of either the XRT7300 or the XRT73L00 device.
0: Indicates that the current state of the “DMO” input pin is “LOW”. If this
input pin is connected to the DMO output of the LIU IC, then this may indi-
cate the occurrence of a fault condition in the “Transmit Output” line.
1: Indicates that the current state of the “DMO” input pin is “High”. If this
input pin is connected to the DMO output of the LIU IC, then this may indi-
cate the occurrence of normal operation in the “Transmit Output” line.
N
OTE
:
For more detailed information on the behavior of the DMO output pin
(from the LIU), please consult either the “XRT7300” or the “XRT73L00” data
sheet.
1
RLOL
RO
0
This “Read-Only” bit-field permits the user to determine the current state of
the “RLOL” input pin. This input pin can be connected to the “RLOL” output
pin of either the XRT7300 or the XRT73L00 device.
0: Indicates that the current state of the “RLOL” input pin is “LOW”. If this
input pin is connected to the “RLOL” output of the LIU IC, then it indicates
that the “Clock Recovery PLL” (within the LIU IC) is locked onto the “incom-
ing” DS3 line signal.
1: Indicates that the current state of the “RLOL” input pin is “HIGH’. If this
input pin is connected to the “RLOL” output of the LIU IC, then it indicates
that the “Clock Recovery PLL” (within the LIU IC) is NOT locked onto the
“incoming” DS3 line signal.
N
OTE
:
For more detailed information on the behavior of the “RLOL” output
pin (from the LIU), please consult either the “XRT7300” or the “XRT73L00”
data sheet.
0
RLOS
RO
0
This “Read-Only” bit-field permits the user to determine the current state of
the “RLOS” input pin. This input pin can (and should be) connected to the
“RLOS” output pin of either the XRT7300 or the XRT73L00 device.
0: Indicates that the current state of the “RLOS” input pin is “LOW”. If this
input pin is connected to the “RLOS” output pin of the LIU IC, then it indi-
cates that the LIU is NOT currently declaring an LOS (Loss of Signal) condi-
tion.
1: Indicates that the current state of the “RLOS” input pin is “HIGH”. If this
input pin is connected to the “RLOS output pin of the LIU IC, then it indicates
that the LIU is currently declaring an LOS condition.
N
OTES
:
1. If this input pin is pulled “High”, then the XRT72L71 will
automatically declare an LOS condition. As a conse-
quence, the user should not treat the the “RLOS” input pin
as a General Purpose Input pin.
2. For more detailed on the “LOS Declaration Criteria” for the
XRT7300 or the XRT73L00 device, please consult either the
“XRT7300” or the “XRT73L00” data sheet.
相關(guān)PDF資料
PDF描述
XRT72L73 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT72L74 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT7300IV E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
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