參數(shù)資料
型號： XRT72L71
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 49/104頁
文件大?。?/td> 1156K
代理商： XRT72L71
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
PRELIMINARY
REV. P1.0.5
49
T
ABLE
5:
UNI I
NTERRUPT
E
NABLE
R
EGISTER
R
EGISTER
4 UNI I
NTERRUPT
E
NABLE
R
EGISTER
H
EX
A
DDRESS
0
X
04
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Rx DS3 INTERRUPT
ENABLE
R/W
0
0: Receive DS3 Framer block interrupts are disabled
1: Receive DS3 Framer interrupts are enabled (at the Block Level)
6
Rx PLCP INTERRUPT
ENABLE
R/W
0
0: Receive PLCP Processor block interrupts are disabled
1: Receive PLCP Processor block interrupts enabled (at the Block Level)
N
OTE
:
This bit-field is only active if the XRT72L71 is configured to operate in the
“ATM UNI/PLCP” Modes.
5
Rx CP INTERRUPT
ENABLE
R/W
0
0: Receive Cell Processor block interrupts are disabled
1: Receive Cell Processor block interrupts are enabled (at the Block Level)
N
OTE
:
This bit-field is only active if the XRT72L71 is configured to operate in the
“ATM UNI” Mode.
4
Rx UTOPIA INTER-
RUPT ENABLE
R/W
0
0: Receive UTOPIA Interface block interrupts are disabled
1: Receive UTOPIA Interface block interrupts are enabled (at the Block Level)
N
OTE
:
T
his bit-field is only active if the XRT72L71 is configured to operate in
the “ATM UNI” Mode.
3
Tx UTOPIA INTER-
RUPT ENABLE
R/W
0
0: Transmit UTOPIA Interface block Interrupts are disabled
1: Transmit UTOPIA Interface block Interrupts are enabled (at the Block Level)
N
OTE
:
This bit-field is only active if the XRT72L71 is configured to operate in the
“ATM UNI’ Mode.
2
Tx CP Interrupt Enable
R/W
0
0: Transmit Cell Processor interrupts are disabled
1: Transmit Cell Processor interrupts are enabled (at the Block Level).
N
OTE
:
This bit-field is only active if the XRT72L71 is configured to operate in the
“ATM UNI” Mode
.
1
Tx DS3 Interrupt
Enable
R/W
0
0: Transmit DS3 Framer block interrupts are disabled
1: Transmit DS3 Framer block interrupts are enabled (at the Block Level).
0
One Sec Interrupt
Enable
R/W
0
0: One second interrupt disabled
1: One second interrupt enabled
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