Rev. 2.00 XRD98L61 BLACK LEVEL OFFSET CALIBRATION To get the maximum color resolution and dynamic range, the XRD9861 uses a digitally contro" />
參數(shù)資料
型號: XRD98L61AIV-F
廠商: Exar Corporation
文件頁數(shù): 14/38頁
文件大?。?/td> 0K
描述: IC CCD DIGITIZER 12BIT 48TQFP
標(biāo)準(zhǔn)包裝: 250
位數(shù): 12
通道數(shù): 1
電壓 - 電源,模擬: 2.7 V ~ 3.6 V
電壓 - 電源,數(shù)字: 2.7 V ~ 3.6 V
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
21
Rev. 2.00
XRD98L61
BLACK LEVEL OFFSET CALIBRATION
To get the maximum color resolution and dynamic
range, the XRD9861 uses a digitally controlled cali-
bration circuit to correct for offset in the CCD signal as
well as offset in the CDS, PGA & ADC signal path. This
CDS
12-bit ADC
Hot Pixel
Clipper
Pixel
Averager
+
-
+
Coarse
Accumulator
Fine
Accumulator
Offset Calibration Logic
12
PGA
Reg
Hold, FastCal
OB[7:0]
PGA[9:0]
DB[11:0]
CDAC
FDAC
+
Black Level
Offset Calibration
Loop
DNS[1:0]
ManCAL
CDAC, FDAC
From Serial
Interface
Registers
CCD
signal
OB Lines[7:0]
Wait[11:0]
DNS
Filter
Avg[2:0]
Figure 9. Black Level Offset Calibration Block Diagram
calibration is done while the CCD outputs Optical Black
(OB) pixels. In the “Line” timing mode, the OB pixels at
the start or end of each scan line are used for calibra-
tion.
Offset Register
ADC Output
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Black Level (LSB)
X
0
Do Not Use
X
0
1
Do Not Use
X
0
1
0
2 (Minimum offset code)
.
X
1
0
254
X
1
255
Table 3. Black Level Output Control
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