參數(shù)資料
型號: XRD9853
廠商: Exar Corporation
英文描述: ()
中文描述: ()
文件頁數(shù): 2/8頁
文件大?。?/td> 75K
代理商: XRD9853
XRDAN103
2
Rev. 1.00
RSTCCD reduces CCD reset noise by disconnecting the input of the XRD9853 from the CCD.
Ideally RSTCCD should encompass the entire CCD reset pulse. If RSTCCD does not
encompass the rising edge of the reset pulse the CDS function is not affected because of the
fast recovery time of PGA1.
The falling edge of RSTCCD starts the tracking of the black level. Any reset noise after the
falling edge of RSTCCD may appear as an offset error in the sampling of the black level.
Offset error is calibrated out in the XRD9853 up to the black level calibration range
(XRDAN108). Therefore, for proper operation RSTCCD must encompass the falling edge
of the Reset Pulse. The minimum pulse width of RSTCCD is 10ns.
For the timing example shown in Figure 1, the falling edge of SHP samples the pixel black
level. The actual sampling point of the pixel black level occurs after a delay of T
bk
. T
bk
is the aperture delay of the SHP timing signal.
For the timing example shown in Figure 1, the falling edge of SHD samples the pixel video
level. The actual sampling point of the pixel video level occurs after a delay of T
vd
. T
vd
is the aperture delay of the SHD timing signal.
Aperture delay is defined as the time difference between the sampling edge and when the input
level is actually sampled. The following table shows the aperture delays for RSTCCD, SHP
and SHD.
Table 2. XRD9853 Aperature Delays Over Power Supply Voltage
XRD9853 Correlated Double Sample/Hold (CDS)
The function of the CDS block, shown in Figure 2, is to sense the voltage difference between
the black level and video level for each pixel. The CDS and PGA are fully differential to reject
common mode noise. The PGA output is converted to a single ended signal, and then fed to
the ADC.
Min
0
Typ
Max
5
7
6
Min
0
Typ
Max
Units
ns
ns
ns
T
RST
(RSTCCD)
T
BK
(SHP)
T
VD
(SHD)
4
6
5
5
4
4
3
Power Supply Voltage
Aperature Delay
3V
5V
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