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參數(shù)資料
| 型號(hào)： | XRD9836ACG |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 16B CCD/CIS SIG PROC 48TSSOP |
| 產(chǎn)品變化通告： | Leaded UART, V&I Obsolescence 11/Apr/2011 |
| 標(biāo)準(zhǔn)包裝： | 39 |
| 位數(shù)： | 16 |
| 通道數(shù)： | 3 |
| 功率（瓦特）： | 500mW |
| 電壓 - 電源，模擬： | 3 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 3 V ~ 3.6 V |
| 封裝/外殼： | 48-TSSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 管件 |
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XRD9836
16-BIT PIXEL GAIN AFE
REV. 1.0.0
13
In addition to the above requirement for LCLMP on a
line by line basis there is an additional requirement
for a one time LCLMP upon power-up to provide the
AC coupling capacitor’s initial charge. The one time
LCLMP pulse width can also be determined from the
Cmax equation above. A typical value, using 1 nf cap,
with initial charge of 3V (Vr - Vc), and a BSAMP pulse
width of 25ns, is estimated to be 1.4us. This is equiv-
alent to one time LCLMP of 56 OB pixels upon power
up.
3-CHANNEL CDS MODE:
This mode allows simultaneous CDS of the red,
green and blue inputs. Black-level sampling occurs on
each pixel and is equal to the width of the BSAMP
sampling input. The black level is held on the sam-
pling edge of BSAMP and the PGA will immediately
begin to track the signal input until the sampling edge
of VSAMP.
At the end of the video sampling phase, the differ-
ence between the reference and video levels is invert-
ed, amplified, and offset depending on the contents of
the PGA gain and offset registers. The RGB channels
are then sequentially converted by a high-speed A/D
converter. Converted data appears on the data output
bus after 9 ADCLK cycles. The red channel is syn-
chronized on the rising edge of the first ADCLK after
the sampling edge of VSAMP. The power-up default
mode is for CDS sampling a CCD input.
1-CHANNEL CDS MODE:
The 1-Channel CDS mode allows high-speed acqui-
sition and processing of a single channel. The timing,
clamp and buffer configurations are similar to the 3-
channel mode described previously. To select a single
channel input, the color bits of configuration selected
by CHAN[1:0] bits, in the MODE register, must be set
to the appropriate value. The A/D input will begin to
track the selected color input on the next positive
edge of ADCLK. If the configuration is toggled from a
single color mode to 3-channel mode, RGB scanning
will not occur until the circuit is re-synchronized on
the sampling edge of VSAMP.
CIS MODE:
The AFE can be configured for inputs from a CCD or
a CIS type device by setting the CCD_CIS bit. For
CIS mode, the following interface features are provid-
ed:
1. DC Coupled Inputs.
2. Gain Range is 0.5 to 5 with 10 bit resolution.
3. It is assumed that CIS Sample and Hold Outputs
and DC offset buffer have low output impedanc-
es(~50 ohms).
4. VSAMP should have typ > 25ns pulse width.
5. LCLMP is not needed for CIS Applications. (except
for APOAM even and odd selection)
6. Input Voltage Range:
Vcm @ Vin- = 0 to 1.4 V
CIS Signal @ Vin+ = 0 to 1.2 V above Vcm offset
3-CHANNEL CIS AND S/H MODE
The XRD9836 also supports operation for Contact
Image Sensor (CIS) and S/H applications. The red
channel is synchronized on the rising edge of the first
ADCLK after the sampling edge of VSAMP.
In this mode of operation, the BSAMP input is con-
nected to DGND, and input sampling occurs on the
falling edge of VSAMP(VSAMP_POL=0).
1-CHANNEL CIS AND S/H MODE:
The 1-channel CIS S/H mode allows high-speed ac-
quisition and processing of a single channel. The tim-
ing, clamp and buffer configurations are similar to the
3-channel mode. In single channel mode one color
channel is selected using CHAN[1:0]. If the configura-
tion is toggled from single color to 3-channel mode,
RGB scanning will not occur until the circuit is re-syn-
chronized by the first sampling edge of VSAMP.
FIGURE 8. CIS SIGNAL PATH
FIGURE 9. CIS WAVEFORM -DEFINITION OF TERMS
CDS
+
PGA
10 bit
Dynamic
Offset
DAC
10 bit
Fine
Offset
DAC
10 bit
ADC
CIS Signal
NC
3:1
MUX
Vcm (DCoffset)
C IS
W aveform
Pixel N
Pixel N+1
Pixel N+2
Pixel N+3
Vcm
INVSR
Pixel N-1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRD9836ACG-F | 功能描述:電信線路管理 IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| XRD9836ACGTR-F | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| XRD9853AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:CCD Image Digitizers with CDS, PGA, and 10-bit A/D |
| XRD9855 | 制造商:EXAR 制造商全稱:EXAR 功能描述:CCD Image Digitizers with CDS, PGA and 10-Bit A/D |
| XRD9855AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:CCD Image Digitizers with CDS, PGA and 10-Bit A/D |
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