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參數(shù)資料
| 型號： | XRD9818EVAL |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 6/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XRD9818 |
| 標準包裝： | 1 |
| 系列： | * |
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XRD9818
xr
3-CHANNEL 16-BIT LINEAR CCD/CIS SENSOR SIGNAL PROCESSOR
REV. 1.0.1
14
3.5
VSAMP Delay Register
The VSAMP Delay register controls the internal delays added to the leading and the trailing edges of the
VSAMP timing signal. The width and position of the VSAMP pulse can be adjusted through the leading and
trailing edge delay settings. This is useful to match the sampling requirements of the incoming CCD/CIS
waveform.
* Power-on default value
VL[4:0] - Sets the amount of delay added to the leading edge of VSAMP.
VT[4:0] - Sets the amount of delay added to the trailing edge of VSAMP.
3.6
ADCLK Delay Register
The ADCLK Delay register controls the delay added to the ADCLK timing signal and Data Output.
* Power-on default value
A[4:0] - Sets the amount of internal delay added to the ADCLK signal.
DO[4:0] - Sets the amount of delay from internal ADCLK to valid data out.
3.7
Test Register
The TEST register is used for EXAR internal test requirements. Do not over write this register.
* Power-on default value
VSAMP DELAY REGISTER SETTINGS
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
VL[4]
VL[3]
VL[2]
VL[1]
VL[0]
VT[4]
VT[3]
VT[2]
VT[1]
VT[0]
VSAMP Leading edge delay
00000*
→ 0ns
00001
→ 1ns
…
11110
→ 30ns
11111
→ 31ns
VSAMP Trailing edge delay
00000*
→ 0ns
00001
→ 1ns
…
11110
→ 30ns
11111
→ 31ns
ADCLK DELAY REGISTER SETTINGS
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
A[4]
A[3]
A[2]
A[1]
A[0]
DO[4]
DO[3]
DO[2]
DO[1]
DO[0]
ADCLK delay
00000*
→ 0ns
00001
→ 1ns
…
11110
→ 30ns
11111
→ 31ns
Output Data valid delay
00000*
→ 0ns
00001
→ 0.5ns
…
11110
→ 15.0ns
11111
→ 15.5ns
TEST REGISTER SETTINGS
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Test Only
00000000*
→ Do not modify
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| XRD9820 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel, 10/12-Bit Linear CCd and CIS Sensor signal Processors |
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| XRD9824ACD-F | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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