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參數(shù)資料
| 型號： | XRD9818EVAL |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XRD9818 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
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xr
xr
XRD9818
3-CHANNEL 16-BIT LINEAR CCD/CIS SENSOR SIGNAL PROCESSOR
REV. 1.0.1
21
5.0
SERIAL PORT INTERFACE
The XRD9818 can be configured through a three pin interface (LOAD, SDI, and SCLK) with the serial port write
timing shown below.
Each write will include 4 bits of address, two dummy bits and 10 bits of data. To insure
a valid write operation, the serial port control must detect minimum of 16 rising SCLK edges. Upon a valid
write the XRD9818 will latch the last 16 bits of data presented at the rising edge of LOAD.
The register
address will be decoded and the 10bits of data will over write the contents of the addressed register.
The
LOAD setup time "Tls" can be indefinitely long.
LOAD is used to gate the SCLK input into the XRD9818. In order to eliminate any unintended high speed
clocks into the part it is recommended that the LOAD signal only be active during the write operation.
FIGURE 13.
SERIAL PORT WRITE TIMING
FIGURE 14. LOAD GATING OF SCLK
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
D8
D9
E0
msb
lsb
LOAD
SCLK
SDI
Tsclk
Tds
Tls
Tlh
Register Address
D
u
m
y
Write Register Data
Tdh
E1
D
u
m
y
Tlpw
SCLK
LOAD
SCLK
(internal)
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| XRD9824ACD-F | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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