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| 型號： | XRD9810 |
| 廠商： | Exar Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁數(shù)： | 12/25頁 |
| 文件大?。?/td> | 647K |
| 代理商： | XRD9810 |
XRD9810/12EVAL
12
Rev. P 1.00
Preliminary
Figure 11. Timing Diagream for Mode 1: AC Coupled 3-Channel Output CCD with
Pixel Clamping
Configuration
J20 open
J21 open
J22 open
J23 open
J27 short
J28 short
Jumper Option Description
AC coupled through external capacitor C9, RED(+) channel
AC coupled through external capacitor C10, GRN(+) channel
AC coupled through external capacitor C12, BLU(+) channel
AC coupled through external capacitor C13, COM(-) channel
OVDD and DVDD common at the power header
AVDD1 and AVDD2 common at the power header
Table 1. XRD9810/12 Evaluation Board Jumper Configuration Mode 1.
Mode 2. CCD, AC Coupled CDS Line Clamping Mode (#00001000010)b
Mode 2. provides for the option of line clamping rather than pixel-by-pixel. This mode is for CCD
applications where the black level voltage is clamped at the beginning or end of each line at
each input capacitor. For this mode the input buffer to the PGA amplifier must be enabled
(control bit PB1) to minimize line drop. Figure 12 is a typical application circuit for Mode 2. For
CCD, AC coupled pixel-by-pixel clamping see Mode 1.
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