REV. 1.0.1 I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER EFR[6]: Auto RTS Flow Control Enable RTS# output may be used for h" />
參數(shù)資料
型號: XR20V2170IL40-F
廠商: Exar Corporation
文件頁數(shù): 29/49頁
文件大?。?/td> 0K
描述: IC UART/TXRX I2C/SPI RS232 40QFN
標(biāo)準(zhǔn)包裝: 490
特點: *
通道數(shù): 1,UART
FIFO's: 64 字節(jié)
規(guī)程: RS232
電源電壓: 2.97 V ~ 3.63 V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN 裸露焊盤(6x6)
包裝: 托盤
其它名稱: 1016-1478
XR20V2170IL40-F-ND
XR20V2170
35
REV. 1.0.1
I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated when the receive FIFO is filled to the programmed trigger level and
RTS de-asserts HIGH at the programmed HALT level. RTS# will return LOW when FIFO data falls below the
programmed RESUME level. The RTS# output must be asserted (LOW) before the auto RTS can take effect.
RTS# pin will function as a general purpose output when hardware flow control is disabled.
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts HIGH.
Data transmission resumes when CTS# returns LOW.
4.21.1
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see Table 8.
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