
XR17V258
6
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.2
RX7
47
I
UART channel 7 Receive Data or infrared receive data. Normal RXD input
idles at HIGH condition. The infrared pulses can be inverted prior to decoding
by setting FCTR bit [4].
RTS7#
52
O
UART channel 7 Request to Send or general purpose output (active LOW).
CTS7#
48
I
UART channel 7 Clear to Send or general purpose input (active LOW).
DTR7#
53
O
UART channel 7 Data Terminal Ready or general purpose output (active
LOW).
DSR7#
49
I
UART channel 7 Data Set Ready or general purpose input (active LOW).
CD7#
50
I
UART channel 7 Carrier Detect or general purpose input (active LOW).
RI7#
51
I
UART channel 7 Ring Indicator or general purpose input (active LOW).
ANCILLARY SIGNALS
MPIO0
108
I/O
Multi-purpose input/output 0. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT
MPIO1
107
I/O
Multi-purpose input/output 1. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO2
74
I/O
Multi-purpose input/output 2. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO3
73
I/O
Multi-purpose input/output 3. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO4
68
I/O
Multi-purpose input/output 4. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO5
67
I/O
Multi-purpose input/output 5. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO6
66
I/O
Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO7
65
I/O
Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
EECK
116
O
Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
EECS
115
O
Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7K ohm resistor for
external sensing of EEPROM during power up. See DAN112 for further
details.
EEDI
114
O
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
EEDO
113
I
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
XTAL1
110
I
Crystal or external clock input.
XTAL2
109
O
Crystal or buffered clock output.
PIN DESCRIPTIONS
NAME
PIN #TYPE
DESCRIPTION