- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376454 > XR17C158 (Exar Corporation) PCI Bus Octal UART(八通用異步接收器/發(fā)送器（滿足通訊系統(tǒng)中PCI總線和高帶寬要求）) PDF資料下載
參數(shù)資料
| 型號： | XR17C158 |
| 廠商： | Exar Corporation |
| 英文描述： | PCI Bus Octal UART(八通用異步接收器/發(fā)送器（滿足通訊系統(tǒng)中PCI總線和高帶寬要求）) |
| 中文描述： | PCI總線八路的UART（八通用異步接收器/發(fā)送器（滿足通訊系統(tǒng)中的PCI總線和高帶寬要求）） |
| 文件頁數(shù)： | 30/51頁 |
| 文件大小： | 685K |
| 代理商： | XR17C158 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
PCI BUS OCTAL UART
XR17C158
PRELIMINARY
REV. 1.0.0
30
4.7
The receiver section contains an 8-bit Receive Shift
Register (RSR) and Receive Holding Register (RHR).
The RSR uses the 16X or 8X clock for timing. It veri-
fies and validates every bit on the incoming character
in the middle of each data bit. On the falling edge of a
start or false start bit, an internal receiver counter
starts counting at the 16X or 8X clock rate. After 8 or
4 clocks the start bit period should be at the center of
the start bit. At this time the start bit is sampled and if
it is still a logic 0 it is validated. Evaluating the start bit
in this manner prevents the receiver from assembling
a false character. The rest of the data bits and stop
bits are sampled and validated in this same manner
to prevent false framing. If there were any error(s),
R
ECEIVER
they are reported in the LSR register bits 1- 4. Upon
unloading the receive data byte from RHR, the re-
ceive FIFO pointer is bumped and the error flags are
immediately updated to reflect the status of the data
byte in RHR register. RHR can generate a receive da-
ta ready interrupt upon receiving a character or delay
until it reaches the FIFO trigger level. Furthemore,
data delivery to the host is guaranteed by a receive
data ready time-out function when receive data does
not reach the receive FIFO trigger level. This time-out
delay is 4 word lengths as defined by LCR[1,0] plus
12 bits time. The RHR interrupt is enabled by IER bit-
0
4.7.1
Receiver Operation in non-FIFO Mode
F
IGURE
13. T
RANSMIITTER
O
PERATION
IN
FIFO
AND
F
LOW
C
ONTROL
M
ODE
Transmit Data Shift Register
(TSR)
Transmit
Data Byte
THR Interrupt (ISR bit-1) falls
below Programmed Trigger
Level (TXTRG) and then
when becomes empty. FIFO
is Enabled by FCR bit-0=1
Transmit
FIFO
(64-Byte)
TXFIFO1
16X or 8X Clock
(8XMODE Register)
Auto CTS Flow Control (CTS# pin)
Auto Software Flow Control
Flow Control Characters
(Xoff1/2 and Xon1/2 Reg.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR17D152 | UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART |
| XR17D152CM | UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART |
| XR17D152IM | UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART |
| XR17D158IV | UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART |
| XR17D158 | UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR17C158CV | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR17C158CV-0A-EVB | 功能描述:UART 接口集成電路 Supports C158 144 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR17C158CV-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR17C158CVTR-F | 制造商:Exar Corporation 功能描述:UART 8-CH 64Byte FIFO 5V 144-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR17C158CVTR-F |
| XR17C158IV | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。