參數(shù)資料
型號: XR16L784IV
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
中文描述: 4 CHANNEL(S), 6.25M bps, SERIAL COMM CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64
文件頁數(shù): 8/52頁
文件大小: 625K
代理商: XR16L784IV
XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
á
REV. 1.2.0
8
2.6
A single Baud Rate Generator (BRG) is provided for the transmitter and receiver, allowing independent TX/RX
channel control. The programmable Baud Rate Generator is capable of operating with a crystal frequency of
up to 24 MHz. However, with an external clock input on XTAL1 pin and a 2K ohms pull-up resistor on XTAL2
pin (as shown in
Figure 4
) it can extend its operation up to 50 MHz (3.125 Mbps serial data rate) at room
temperature and 5.0V.
F
IGURE
4. E
XTERNAL
C
LOCK
C
ONNECTION
FOR
E
XTENDED
D
ATA
R
ATE
Programmable Baud Rate Generator
Each UART has its own Baud Rate Generator (BRG) with a prescaler for the transmitter and receiver. The
prescaler is controlled by a software bit in the MCR register. The MCR register bit-7 sets the prescaler to divide
the input crystal or external clock by 1 or 4. The output of the prescaler clocks to the BRG. The BRG further
divides this clock by a programmable divisor between 1 and (2
16
-1) to obtain a 16X or 8X sampling clock of
the serial data rate. The sampling clock is used by the transmitter for data bit shifting and
receiver for data
sampling. The BRG divisor (DLL and DLM registers) defaults to a random value upon power up. Therefore, the
BRG must be programmed during initialization to the operating data rate.
F
IGURE
5. B
AUD
R
ATE
G
ENERATOR
2K
XTAL1
XTAL2
R1
VCC
External Clock
vcc
gnd
XTAL1
XTAL2
Crystal
Osc/
Buffer
MCR Bit-7=0
(default)
MCR Bit-7=1
DLL and DLM
Registers
Prescaler
Divide by 1
Prescaler
Divide by 4
16X or 8X
Sampling
Rate Clock to
Transmitter
and Receiver
To Other
Channels
Baud Rate
Generator
Logic
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