參數(shù)資料
型號(hào)： XR16L651IM-F
廠(chǎng)商： Exar Corporation
文件頁(yè)數(shù)： 13/56頁(yè)
文件大?。?/td> 0K
描述： IC UART FIFO 32B 48TQFP
標(biāo)準(zhǔn)包裝： 250
特點(diǎn)： *
通道數(shù)： 1，UART
FIFO's： 32 字節(jié)
規(guī)程： 打印機(jī)，RS232，RS422，RS485
電源電壓： 2.25 V ~ 5.5 V
帶并行端口： 是
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類(lèi)型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 托盤(pán)
XR16L651
á
2.25V TO 5.5V UART WITH 32-BYTE FIFO
REV. 1.3.0
20
2.16
Infrared Mode
The 651 UART includes the infrared encoder and decoder compatible to the IrDA (Infrared Data Association)
version 1.0. The input pin ENIR conveniently activates the infrared mode. Activating the ENIR pin prior to
power up prevents the infrared light emitting diode (LED) from turning on and drawing large amount of supply
current while the system is powering up. The ENIR pin is sampled after the reset signal (RESET or RESET#)
has been de-asserted. The ENIR pin also sets the MCR register bit-6 to a ‘1’. After a reset, the software can
overwrite MCR bit-6 if so desired. In the infrared mode, the user can choose to send/receive data either half-
duplex or full-duplex. The half-duplex mode is chosen by setting bit-0 of XFR register to a ‘1’. This prevents
echoed data from reaching the receiver. When the infrared feature is enabled, the transmit data outputs, TX,
idles at logic zero level. Likewise, the RX input assumes an idle level of logic zero, see Figure 14.
The IrDA standard defines the infrared encoder sends out a 3/16 of a bit wide HIGH-pulse for each “0” bit in the
transmit data stream. This signal encoding reduces the on-time of the infrared LED, hence reduces the power
consumption. See Figure 14 below. The 651 has an additional feature to allow user to vary the transmit pulse
width further reducing power consumption of the system where application permits (see IRPW register for
details).
The wireless infrared decoder receives the input pulse from the infrared sensing diode on RX pin. Each time it
senses a light pulse, it returns a logic 0 to the data bit stream. The 651 also includes another feature - inversion
of the IR pulse (XFR register bit-1), where a LOW IR pulse in the receive data stream is recognized as a ’0’ bit.
FIGURE 14. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING
Character
Data Bits
Start
Stop
00
0
11
1
Bit Time
1/16 Clock Delay
IRdecoder-1
RX Data
Receive
IR Pulse
(RX pin)
C haracte r
D a ta B its
St
ar
t
St
op
00
0
11
1
T X D a ta
T ransm it
IR P u lse
(T X Pin )
Bit Tim e
1/2 B it T im e
3/16 B it T im e
IrE n coder-1
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