參數(shù)資料
型號(hào): XR16L2550IL
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: LOW VOLTAGE DUART WITH 16-BYTE FIFO
中文描述: 2 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, QCC32
封裝: 5 X 5 MM, 0.90 MM HEIGHT, QFN-32
文件頁(yè)數(shù): 7/45頁(yè)
文件大?。?/td> 278K
代理商: XR16L2550IL
á
REV. 1.0.0
XR16L2550
LOW VOLTAGE DUART WITH 16-BYTE FIFO
7
2.0
FUNCTIONAL DESCRIPTIONS
2.1
The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and
write transactions. The L2550 data interface supports the Intel compatible types of CPUs and it is compatible to
the industry standard 16C550 UART. No clock (oscillator nor external clock) is required to operate a data bus
transaction. Each bus cycle is asynchronous using CS#, IOR# and IOW# signals. Both UART channels share
the same data bus for host operations. The data bus interconnections are shown in
Figure 3
.
CPU Interface
.
2.2
The L2550 can accept up to 5V inputs even when operating at 3.3V or 2.5V. But note that if the L2550 is
operating at 2.5V, its V
OH
may not be high enough to meet the requirements of the V
IH
of a CPU or a serial
transceiver that is operating at 5V.
2.3
Device Reset
The RESET input resets the internal registers and the serial interface outputs in both channels to their default
state (see
Table 13
). An active high pulse of at least 40 ns duration will be required to activate the reset function
in the device.
2.4
Channel A and B Selection
The UART provides the user with the capability to bi-directionally transfer information between an external CPU
and an external serial communication device. A logic 0 on chip select pins, CSA# or CSB#, allows the user to
select UART channel A or B to configure, send transmit data and/or unload receive data to/from the UART.
Selecting both UARTs can be useful during power up initialization to write to the same internal registers, but do
not attempt to read from both uarts simultaneously. Individual channel select functions are shown in
Table 1
.
5-Volt Tolerant Inputs
F
IGURE
3. XR16L2550 D
ATA
B
US
I
NTERCONNECTIONS
T
ABLE
1: C
HANNEL
A
AND
B S
ELECT
CSA#
CSB#
F
UNCTION
1
1
UART de-selected
0
1
Channel A selected
VCC
VCC
OP2A#
DSRA#
CDA#
CTSA#
RTSA#
DTRA#
RXA
TXA
RIA#
OP2B#
DSRB#
CDB#
CTSB#
RTSB#
DTRB#
RXB
TXB
RIB#
GND
A0
A1
A2
UART_CSA#
UART_CSB#
IOR#
IOW#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
CSA#
CSB#
D0
D2
D3
D6
IOR#
IOW#
UART
Channel A
UART
Channel B
UART_INTB
UART_INTA
INTB
INTA
RXRDYA#
TXRDYB#
TXRDYA#
RXRDYA#
TXRDYB#
TXRDYA#
RXRDYB#
RXRDYB#
UART_RESET
RESET
RS-232 Serial Interface
RS-232 Serial Interface
相關(guān)PDF資料
PDF描述
XR16L2550IM LOW VOLTAGE DUART WITH 16-BYTE FIFO
XR16L2550 LOW VOLTAGE DUART WITH 16-BYTE FIFO
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