參數(shù)資料
型號: XR16C2852IJ
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: 3.3V AND 5V DUART WITH 128-BYTE FIFO
中文描述: 2 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 13/42頁
文件大?。?/td> 574K
代理商: XR16C2852IJ
XR16C2852
REV. 2.0.0
3.3V AND 5V DUART WITH 128-BYTE FIFO
á
13
2.13 A
UTO
RTS (H
ARDWARE
) F
LOW
C
ONTROL
Automatic RTS hardware flow control is used to pre-
vent data overrun to the local receiver FIFO. The
RTS# output is used to request remote unit to sus-
pend/resume data transmission. The auto RTS flow
control features is enabled to fit specific application
requirement (see Figure 11):
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting
RTS# output pin (MCR bit-1 to logic 1 after it is
enabled).
Enable RTS interrupt through IER bit-6 (after set-
ting EFR bit-4). The UART issues an interrupt when
the RTS# pin makes a transition from low to high:
ISR bit-5 will be set to logic 1.
2.14 A
UTO
RTS H
YSTERESIS
The 2852 has a new feature that provides flow control
trigger hysteresis while maintaining compatibility with
the XR16C850, ST16C650A and ST16C550 family of
UARTs. With the Auto RTS function enabled, an in-
terrupt is generated when the receive FIFO reaches
the programmed RX trigger level. The RTS# pin will
not be forced to a logic 1 (RTS off), until the receive
FIFO reaches the upper limit of the hysteresis level.
The RTS# pin will return to a logic 0 after the RX
FIFO is unloaded to the lower limit of the hysteresis
level. Under the above described conditions, the
2852 will continue to accept data until the receive
FIFO gets full. The Auto RTS function is initiated
when the RTS# output pin is asserted to a logic 0
(RTS On). Table 13 shows the complete details for
the Auto RTS# Hysteresis levels. Please note that
this table is for programmable trigger levels only (Ta-
ble D). The hysteresis values for Tables A-C are the
next higher and next lower trigger levels in the corre-
sponding table.
2.15 A
UTO
CTS F
LOW
C
ONTROL
Automatic CTS flow control is used to prevent data
overrun to the remote receiver FIFO. The CTS# input
is monitored to suspend/restart the local transmitter.
The auto CTS flow control feature is selected to fit
specific application requirement (see Figure 11):
Enable auto CTS flow control using EFR bit-7.
Enable CTS interrupt through IER bit-7 (after set-
ting EFR bit-4). The UART issues an interrupt when
the CTS# pin is de-asserted (logic 1): ISR bit-5 will
be set to 1, and UART will suspend transmission as
soon as the stop bit of the character in process is
shifted out. Transmission is resumed after the
CTS# input is re-asserted (logic 0), indicating more
data may be sent.
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