參數(shù)資料
型號(hào)： XR16C2852IJ
廠商： EXAR CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 3.3V AND 5V DUART WITH 128-BYTE FIFO
中文描述： 2 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 10/42頁(yè)
文件大?。?/td> 574K
代理商： XR16C2852IJ
á
3.3V AND 5V DUART WITH 128-BYTE FIFO
XR16C2852
REV. 2.0.0
10
2.11 T
RANSMITTER
The transmitter section comprises of an 8-bit Transmit
Shift Register (TSR) and 128 bytes of FIFO which in-
cludes a byte-wide Transmit Holding Register (THR).
TSR shifts out every data bit with the 16X internal
clock. A bit time is 16 clock periods. The transmitter
sends the start-bit followed by the number of data
bits, inserts the proper parity-bit if enabled, and adds
the stop-bit(s). The status of the FIFO and TSR are
reported in the Line Status Register (LSR bit-5 and
bit-6).
2.11.1 Transmit Holding Register (THR) - Write
Only
The transmit holding register is an 8-bit register pro-
viding a data interface to the host processor. The host
writes transmit data byte to the THR to be converted
into a serial data stream including start-bit, data bits,
parity-bit and stop-bit(s). The least-significant-bit (Bit-
0) becomes first data bit to go out. The THR is the in-
put register to the transmit FIFO of 128 bytes when
FIFO operation is enabled by FCR bit-0. Every time a
write operation is made to the THR, the FIFO data
pointer is automatically bumped to the next sequential
data location.
2.11.2 Transmitter Operation in non-FIFO Mode
The host loads transmit data to THR one character at
a time. The THR empty flag (LSR bit-5) is set when
the data byte is transferred to TSR. THR flag can
generate a transmit empty interrupt (ISR bit-1) when
it is enabled by IER bit-1. The TSR flag (LSR bit-6) is
set when TSR becomes completely empty.
T
ABLE
5: T
YPICAL
DATA
RATES
WITH
A
14.7456 MH
Z
CRYSTAL
OR
EXTERNAL
CLOCK
O
UTPUT
Data Rate
MCR Bit-7=1
O
UTPUT
Data Rate
MCR Bit-7=0
(D
EFAULT
)
D
IVISOR
FOR
16x
Clock (Decimal)
D
IVISOR
FOR
16x
Clock (HEX)
DLM
P
ROGRAM
V
ALUE
(HEX)
DLL
P
ROGRAM
V
ALUE
(HEX)
D
ATA
R
ATE
E
RROR
(%)
100
400
2304
900
09
00
0
600
2400
384
180
01
80
0
1200
4800
192
C0
00
C0
0
2400
9600
96
60
00
60
0
4800
19.2k
48
30
00
30
0
9600
38.4k
24
18
00
18
0
19.2k
76.8k
12
0C
00
0C
0
38.4k
153.6k
6
06
00
06
0
57.6k
230.4k
4
04
00
04
0
115.2k
460.8k
2
02
00
02
0
230.4k
921.6k
1
01
00
01
0
相關(guān)PDF資料
PDF描述
XR16C850CJ UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
XR16C850CM UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
XR16C850CP UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
XR16C850CQ UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
XR16C850 UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR16C2852IJ-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16C2852IJTR-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR-16C450CJ 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:UART
XR-16C450CP 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:UART
XR-16C452CJ 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:UART
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*