參數(shù)資料
型號(hào)： XQ2V1000
廠商： Xilinx, Inc.
英文描述： QPro Virtex-II 1.5V Military QML Platform FPGAs
中文描述： QPro的Virtex - II 1.5V的軍事QML第平臺(tái)FPGA
文件頁數(shù)： 68/128頁
文件大?。?/td> 2738K
代理商： XQ2V1000
QPro Virtex-II 1.5V Military QML Platform FPGAs
68
www.xilinx.com
1-800-255-7778
DS122 (v1.1) January 7, 2004
Product Specification
R
QPro Virtex-II Pin-to-Pin Input Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted.
Global Clock Setup and Hold for LVTTL Standard,
with
DCM
Global Clock Setup and Hold for LVTTL Standard,
without
DCM
Table 59:
Global Clock Setup and Hold for LVTTL Standard,
with
DCM
Description
Symbol
Device
Value
Units
Input Setup and Hold Time Relative to Global Clock Input
Signal for LVTTL Standard.
For data input with different standards, adjust the setup time
delay by the values shown in
IOB Input Switching
Characteristics Standard Adjustments
, page 53
.
No Delay
Global Clock and IFF with DCM
T
PSDCM
/T
PHDCM
XQ2V1000
1.84/–0.76
ns
XQ2V3000
1.96/–0.76
ns
XQ2V6000
1.96/–0.76
ns
Notes:
1.
2.
IFF = Input Flip-Flop or Latch
Setup time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
Table 60:
Global Clock Setup and Hold for LVTTL Standard,
without
DCM
Description
Symbol
Device
Value
Units
Input Setup and Hold Time Relative to Global Clock Input
Signal for LVTTL Standard.
(1)
For data input with different standards, adjust the setup time
delay by the values shown in
IOB Input Switching
Characteristics Standard Adjustments
, page 53
.
Full Delay
Global Clock and IFF
(2)
without DCM
T
PSFD
/T
PHFD
XQ2V1000
2.21/ 0.00
ns
XQ2V3000
2.21/ 0.00
ns
XQ2V6000
2.21/ 0.50
ns
Notes:
1.
Setup time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
IFF = Input Flip-Flop or Latch
These values are parametrically measured.
2.
3.
ds122_1_1.fm Page 68 Wednesday, January 7, 2004 9:15 PM
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