- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄375044 > XQ2V1000 (Xilinx, Inc.) QPro Virtex-II 1.5V Military QML Platform FPGAs PDF資料下載
參數(shù)資料
| 型號(hào)： | XQ2V1000 |
| 廠商： | Xilinx, Inc. |
| 英文描述： | QPro Virtex-II 1.5V Military QML Platform FPGAs |
| 中文描述： | QPro的Virtex - II 1.5V的軍事QML第平臺(tái)FPGA |
| 文件頁(yè)數(shù)： | 1/128頁(yè) |
| 文件大?。?/td> | 2738K |
| 代理商： | XQ2V1000 |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
DS122 (v1.1) January 7, 2004
Product Specification
www.xilinx.com
1-800-255-7778
1
2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm
.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Summary of QPro Virtex-II Features
Industry First Military Grade Platform FPGA Solution
Certified to MIL-PRF-38535 (Qualified Manufacturer
Listing)
100% Factory Tested
Guaranteed over the full military temperature range
(–55
°
C to +125
°
C)
Ceramic and Plastic Wire-Bond and Flip-Chip Grid
Array Packages
IP-Immersion Architecture
-
Densities from 1M to 6M system gates
-
300+ MHz internal clock speed (Advance Data)
-
622+ Mb/s I/O (Advance Data)
SelectRAM Memory Hierarchy
-
2.5 Mb of dual-port RAM in 18 Kbit block
SelectRAM resources
-
Up to 1 Mb of distributed SelectRAM
resources
High-Performance Interfaces to External Memory
-
DRAM interfaces
·
SDR/DDR SDRAM
·
Network FCRAM
·
Reduced Latency DRAM
-
SRAM interfaces
·
SDR/DDR SRAM
·
QDR SRAM
-
CAM interfaces
Arithmetic Functions
-
Dedicated 18-bit x 18-bit multiplier blocks
-
Fast look-ahead carry logic chains
Flexible Logic Resources
-
Up to 67,584 internal registers/latches with Clock
Enable
-
Up to 67,584 look-up tables (LUTs) or cascadable
16-bit shift registers
-
Wide multiplexers and wide-input function support
-
Horizontal cascade chain and sum-of-products
support
-
Internal 3-state busing
High-Performance Clock Management Circuitry
-
Up to 12 DCM (Digital Clock Manager) modules
·
Precise clock de-skew
·
Flexible frequency synthesis
·
High-resolution phase shifting
-
16 global clock multiplexer buffers
Active Interconnect Technology
-
-
Fourth generation segmented routing structure
Predictable, fast routing delay, independent of
fanout
SelectIO-Ultra Technology
-
Up to 824 user I/Os
-
19 single-ended and six differential standards
-
Programmable sink current (2 mA to 24 mA) per
I/O
-
Digitally Controlled Impedance (DCI) I/O: on-chip
termination resistors for single-ended I/O standards
-
PCI compliant (32/33 MHz) at 3.3V
-
Differential Signaling
·
622 Mb/s Low-Voltage Differential Signaling I/O
(LVDS) with current mode drivers
·
Bus LVDS I/O
·
Lightning Data Transport (LDT) I/O with current
driver buffers
·
Low-Voltage Positive Emitter-Coupled Logic
(LVPECL) I/O
·
Built-in DDR input and output registers
-
Proprietary high-performance SelectLink
Technology
·
High-bandwidth data path
·
Double Data Rate (DDR) link
·
Web-based HDL generation methodology
Supported by Xilinx Foundation Series and Alliance
Series Development Systems
-
Integrated VHDL and Verilog design flows
-
Compilation of 10M system gates designs
-
Internet Team Design (ITD) tool
SRAM-Based In-System Configuration
-
Fast SelectMAP configuration
-
Triple Data Encryption Standard (DES) security
option (Bitstream Encryption)
-
IEEE 1532 support
-
Partial reconfiguration
-
Unlimited reprogrammability
-
Readback capability
0.15 μm 8-Layer Metal Process with 0.12 μm
High-Speed Transistors
1.5V (V
CCINT
) Core Power Supply, Dedicated 3.3V
V
CCAUX
Auxiliary and V
CCO
I/O Power Supplies
IEEE 1149.1 Compatible Boundary-Scan Logic
Support
0
QPro Virtex-II 1.5V Military QML
Platform FPGAs
DS122 (v1.1) January 7, 2004
0
0
Product Specification
R
ds122_1_1.fm Page 1 Wednesday, January 7, 2004 9:15 PM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XQ2V1000-4BG575M | QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4BG575N | QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4BG728M | QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4BG728N | QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4CF1144M | QPro Virtex-II 1.5V Military QML Platform FPGAs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XQ2V1000_1 | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QPro Virtex-II 1.5V Platform FPGAs |
| XQ2V1000-4BG575M | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4BG575N | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4BG728M | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4BG728N | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。