參數(shù)資料
型號(hào)： XPGA
廠商： Lattice Semiconductor Corporation
英文描述： The ispXPGA architecture
中文描述： 在ispXPGA架構(gòu)
文件頁(yè)數(shù)： 38/89頁(yè)
文件大?。?/td> 941K
代理商： XPGA
Lattice Semiconductor
ispXPGA Family Data Sheet
38
sysCLOCK PLL Timing
Over Recommended Operating Conditions
Symbol
Parameter
Conditions
Min
Max
Units
t
PWH
t
PWL
t
R
, t
F
t
INSTB
f
MDIVIN
f
MDIVOUT
f
NDIVIN
f
NDIVOUT
f
VDIVIN
f
VDIVOUT
t
OUTDUTY
Input clock, high time
80% to 80%
1.2
—
ns
Input clock, low time
20% to 20%
1.2
—
ns
Input Clock, rise and fall time
20% to 80%
—
3.0
ns
Input clock stability, cycle to cycle (peak)
—
+/- 250
ps
M Divider input, frequency range
10
320
MHz
M Divider output, frequency range
10
320
MHz
N Divider input, frequency range
10
320
MHz
N Divider output, frequency range
10
320
MHz
V Divider input, frequency range
100
400
MHz
V Divider output, frequency range
10
320
MHz
output clock, duty cycle
40
60
%
t
JIT(CC)
Output clock, cycle to cycle jitter (peak)
Clean reference.
10 MHz < f
MDIVOUT
< 20 MHz or
100MHz < f
VDIVIN
< 160 MHz
Clean reference.
20 MHz < f
MDIVOUT
< 320 MHz and
160MHz < f
VDIVIN
< 320 MHz
Clean reference.
10 MHz < f
MDIVOUT
< 20 MHz or
100MHz < f
VDIVIN
< 160 MHz
Clean reference.
20 MHz < f
MDIVOUT
< 320 MHz and
160MHz < f
VDIVIN
< 320 MHz
Internal feedback
—
+/- 250
ps
—
+/- 150
ps
T
JIT(PERIOD)
Output clock, period jitter (peak)
—
+/- 300
ps
—
+/- 150
ps
t
CLK_OUT_DELAY
Input clock to CLK_OUT delay
t
PHASE
Input clock to external feedback delta
t
LOCK
Time to acquire phase lock after input stable
t
PLL_DELAY
Delay increment (Lead/Lag)
t
RANGE
Total output delay range (lead/lag)
t
PLL_RSTW
Minimum reset pulse width
t
CLK_IN
Global clock input delay
t
PLL_SEC_DELAY
Secondary PLL output delay (t
PLL_DELAY
)
1. This condition assures that the output phase jitter will remain within speci
fi
cation
2. Accumulated jitter measured over 10,000 waveform samples
3. Internal timing for reference only.
—
3.0
ns
External feedback
—
600
ps
—
25
us
Typical = +/- 250ps
+/- 120 +/- 550
ps
+/- 0.84 +/- 3.85
ns
—
1.8
ns
3
—
1.0
ns
—
1.5
ns
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XPGBWT-01-0000-00DC4 制造商:CREE 制造商全稱:Cree, Inc 功能描述:Cree?? XLamp?? XP Family LEDs
XPGBWT-01-0000-00DC5 功能描述:大功率LED - 白色 White, 107lm RoHS:否 制造商:Cree, Inc. 照明顏色:Cool White 顏色溫度:5000 K 光通量:280 lm 顯示角:125 deg 正向電流:700 mA 正向電壓:2.9 V 安裝風(fēng)格:SMD/SMT 系列:XMLBWW 封裝:Reel
XPGBWT-01-0000-00DC6 功能描述:大功率LED - 白色 White, 107lm RoHS:否 制造商:Cree, Inc. 照明顏色:Cool White 顏色溫度:5000 K 光通量:280 lm 顯示角:125 deg 正向電流:700 mA 正向電壓:2.9 V 安裝風(fēng)格:SMD/SMT 系列:XMLBWW 封裝:Reel
XPGBWT-01-0000-00DD4 制造商:CREE 制造商全稱:Cree, Inc 功能描述:Cree?? XLamp?? XP Family LEDs
XPGBWT-01-0000-00DD5 功能描述:大功率LED - 白色 White, 107lm RoHS:否 制造商:Cree, Inc. 照明顏色:Cool White 顏色溫度:5000 K 光通量:280 lm 顯示角:125 deg 正向電流:700 mA 正向電壓:2.9 V 安裝風(fēng)格:SMD/SMT 系列:XMLBWW 封裝:Reel
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