參數(shù)資料
型號(hào): XPC862
廠商: Motorola, Inc.
英文描述: Hardware Specifications
中文描述: 硬件規(guī)格
文件頁(yè)數(shù): 4/88頁(yè)
文件大?。?/td> 483K
代理商: XPC862
4
MPC862/857T/857DSL Hardware Specifications
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Features
— 12 port pins with interrupt capability
— The MPC862P and MPC862T have 23 internal interrupt sources; the MPC857T and
MPC857DSL have 20 internal interrupt sources
— Programmable priority between SCCs (MPC862P and MPC862T)
— Programmable highest priority request
Communications processor module (CPM)
— RISC controller
— Communication-specific commands (for example,
MODE
, and
RESTART
TRANSMIT
)
— Supports continuous mode transmission and reception on all serial channels
— Up to 8-Kbytes of dual-port RAM
— The MPC862P and MPC862T have 16 serial DMA (SDMA) channels; the MPC857T and
MPC857DSL have 10 serial DMA (SDMA) channels
— Three parallel I/O registers with open-drain capability
Four baud rate generators
— Independent (can be connected to any SCC or SMC)
— Allow changes during operation
— Autobaud support option
The MPC862P and MPC862T have four SCCs (serial communication controller) The MPC857T
and MPC857DSL have one SCC, SCC1; the MPC857DSL supports ethernet only
— Serial ATM capability on all SCCs
— Optional UTOPIA port on SCC4
— Ethernet/IEEE 802.3 optional on SCC1–4, supporting full 10-Mbps operation
— HDLC/SDLC
— HDLC bus (implements an HDLC-based local area network (LAN))
— Asynchronous HDLC to support PPP (point-to-point protocol)
— AppleTalk
— Universal asynchronous receiver transmitter (UART)
— Synchronous UART
— Serial infrared (IrDA)
— Binary synchronous communication (BISYNC)
— Totally transparent (bit streams)
— Totally transparent (frame based with optional cyclic redundancy check (CRC))
Two SMCs (serial management channels) (The MPC857DSL has one SMC, SMC1 for UART)
— UART
— Transparent
— General circuit interface (GCI) controller
— Can be connected to the time-division multiplexed (TDM) channels
One serial peripheral interface (SPI)
— Supports master and slave modes
— Supports multiple-master operation on the same bus
GRACEFUL
STOP
TRANSMIT
,
ENTER
HUNT
F
Freescale Semiconductor, Inc.
n
.
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