參數(shù)資料
型號(hào): XC6SLX100T-3FG900I
廠商: Xilinx Inc
文件頁(yè)數(shù): 3/89頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SPARTAN 6 900FGGBGA
標(biāo)準(zhǔn)包裝: 27
系列: Spartan® 6 LXT
LAB/CLB數(shù): 7911
邏輯元件/單元數(shù): 101261
RAM 位總計(jì): 4939776
輸入/輸出數(shù): 498
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 900-BBGA
供應(yīng)商設(shè)備封裝: 900-FBGA
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
DS162 (v3.0) October 17, 2011
Product Specification
11
Table 10: Differential I/O Standard DC Input and Output Levels
I/O Standard
VID
VICM
VOD
VOCM
VOH
VOL
mV,
Min
mV,
Max
V, Min
V, Max
mV, Min
mV,
Max
V, Min
V, Max
V, Min
V, Max
100
600
0.3
2.35
247
454
1.125
1.375
100
600
0.3
2.35
247
454
1.125
1.375
100
0.3
2.35
240
460
Typical 50% VCCO
––
MINI_LVDS_33
200
600
0.3
1.95
300
600
1.0
1.4
MINI_LVDS_25
200
600
0.3
1.95
300
600
1.0
1.4
LVPECL_33(2)(3)
100
1000
0.3
2.8(1)
Inputs only
LVPECL_25(2)(3)
100
1000
0.3
1.95
Inputs only
RSDS_33(2)(3)
100
0.3
1.5
100
400
1.0
1.4
RSDS_25(2)(3)
100
0.3
1.5
100
400
1.0
1.4
TMDS_33
150
1200
2.7
3.23(1)
400
800
VCCO –0.405 VCCO – 0.190
100
400
0.2
2.3
100
400
0.5
1.4
100
400
0.2
2.3
100
400
0.5
1.4
DISPLAY_PORT
190
1260
0.3
2.35
Typical 50% VCCO
––
DIFF_MOBILE_DDR
100
0.78
1.02
90% VCCO 10% VCCO
DIFF_HSTL_I
100
0.68
0.9
VCCO –0.4
0.4
DIFF_HSTL_II
100
0.68
0.9
VCCO –0.4
0.4
DIFF_HSTL_III
100
0.68
0.9
VCCO –0.4
0.4
DIFF_HSTL_I_18
100
0.8
1.1
VCCO –0.4
0.4
DIFF_HSTL_II_18
100
0.8
1.1
VCCO –0.4
0.4
DIFF_HSTL_III_18
100
0.8
1.1
VCCO –0.4
0.4
DIFF_SSTL3_I
100
1.0
1.9
VTT +0.6
VTT –0.6
DIFF_SSTL3_II
100
1.0
1.9
VTT +0.8
VTT –0.8
DIFF_SSTL2_I
100
1.0
1.5
VTT +0.61 VTT –0.61
DIFF_SSTL2_II
100
1.0
1.5
VTT +0.81 VTT –0.81
DIFF_SSTL18_I
100
0.7
1.1
VTT +0.47 VTT –0.47
DIFF_SSTL18_II
100
0.7
1.1
VTT +0.6
VTT –0.6
DIFF_SSTL15_II
100
0.55
0.95
VTT +0.4
VTT –0.4
Notes:
1.
LVPECL_33 and TMDS_33 maximum VICM is the lower of V (maximum) or VCCAUX –(VID/2)
2.
When VCCAUX = 3.3V, the DCD can be higher than 5% for VICM < 0.7V when using these I/O standards: LVDS_25, LVDS_33, BLVDS_25,
LVPECL_25, LVPECL_33, RSDS_25, RSDS_33, PPDS_25, and PPDS_33.
3.
The -1L devices require VCCAUX = 2.5V when using the LVDS_25, LVDS_33, BLVDS_25, LVPECL_25, RSDS_25, RSDS_33, PPDS_25,
and PPDS_33 I/O standards on inputs. LVPECL_33 is not supported in the -1L devices.
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