參數(shù)資料
型號: XC4VLX100-10FFG1513C
廠商: Xilinx Inc
文件頁數(shù): 37/58頁
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-4 100K 1513-FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-4 LX
LAB/CLB數(shù): 12288
邏輯元件/單元數(shù): 110592
RAM 位總計: 4423680
輸入/輸出數(shù): 960
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1513-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1513-FCBGA(40x40)
其它名稱: 122-1487
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
DS302 (v3.7) September 9, 2009
Product Specification
42
Table 50: Miscellaneous Timing Parameters
Symbol
Description
Speed Grade
Units
-12
-11
-10
Time Required to Achieve LOCK
T_LOCK_DLL_240
DLL output – Frequency range > 240 MHz (2)
20
s
T_LOCK_DLL_120_240
DLL output – Frequency range 120 - 240 MHz (1,2)
63
s
T_LOCK_DLL_60_120
DLL output – Frequency range 60 - 120 MHz (1,2)
225
s
T_LOCK_DLL_50_60
DLL output – Frequency range 50 - 60 MHz(1,2)
325
s
T_LOCK_DLL_40_50
DLL output – Frequency range 40 - 50 MHz (1,2)
500
s
T_LOCK_DLL_30_40
DLL output – Frequency range 30 - 40 MHz (1,2)
900
s
T_LOCK_DLL_24_30
DLL output – Frequency range 24 - 30 MHz(1,2)
1250
s
T_LOCK_DLL_30
DLL output – Frequency range < 30 MHz (2)
1250
s
T_LOCK_FX_MAX
DFS outputs(3)
10
ms
T_LOCK_DLL_FINE_SHIFT
Multiplication factor for DLL lock time with Fine Shift
2
Fine Phase Shifting
FINE_SHIFT_RANGE_MS
Absolute shifting range in maximum speed mode
7
ns
FINE_SHIFT_RANGE_MR
Absolute shifting range in maximum range mode
10
ns
Delay Lines
DCM_TAP_MS_MIN
Tap delay resolution (Min) in maximum speed mode
5
ps
DCM_TAP_MS_MAX
Tap delay resolution (Max) in maximum speed mode
40
ps
DCM_TAP_MR_MIN
Tap delay resolution (Min) in maximum range mode
10
ps
DCM_TAP_MR_MAX
Tap delay resolution (Max) in maximum range mode
60
ps
Input Signal Requirements
DCM_RESET(4)
Minimum duration that RST must be held asserted
200
ms
Maximum duration that RST can be held asserted(5)
10
sec
DCM_INPUT_CLOCK_STOP
Maximum duration that CLKIN and CLKFB can be
stopped(6,7)
100
ms
Notes:
1.
For boundary frequencies, choose the higher delay.
2.
DLL Outputs are used in these instances to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
3.
DFS Outputs are used in these instances to describe the outputs: CLKFX and CLKFX180.
4.
CLKIN must be present and stable during the DCM_RESET.
5.
This only applies to production step 1 LX and SX devices. For these devices, use the design solutions described in Answer Record 21127 for support
of longer reset durations. Production step 2 LX and SX devices and all production FX devices do not have this requirement.
6.
For production step 1 LX and SX devices, use the design solutions described in Answer Record 21127 for support of longer durations of stopped
clocks. For production step 2 LX and SX devices and all production FX devices, the ISE software automatically inserts a small macro to support
longer durations of stopped clocks.
7.
For all stepping levels, once the input clock is toggling again and stable after being stopped, DCM must be reset.
相關(guān)PDF資料
PDF描述
XC4VLX25-12FFG676C IC FPGA VIRTEX-4 LX 25K 676-FBGA
XC5202-5PQ100C IC - FPGA SPEED GRADE 5 COM TEMP
XC56309AG100AR2 IC DSP 24BIT 100MHZ 144-LQFP
XC56L307VF160 IC DSP 24BIT FIXED POINT 196-BGA
XC56L307VL160 IC DSP 24BIT FIXED POINT 196-BGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC4VLX100-10FFG1513I 功能描述:IC FPGA VIRTEX-4LX 100K 1513FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-4 LX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC4VLX100-11FF1148C 制造商:Xilinx 功能描述:FPGA VIRTEX-4 110592 CELLS 90NM 1.2V 1148FCBGA - Trays
XC4VLX100-11FF1148I 功能描述:IC FPGA VIRTEX-4LX 1148FFBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-4 LX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC4VLX100-11FF1513C 制造商:Xilinx 功能描述:FPGA VIRTEX-4 110592 CELLS 90NM 1.2V 1513FCBGA - Trays
XC4VLX100-11FF1513I 功能描述:IC FPGA VIRTEX-4LX 1513FFBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-4 LX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)