參數(shù)資料
| 型號： | XC3195A-3PQ160C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 23/76頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA 484 CLB'S 160-PQFP |
| 產品變化通告： | XC4000XL/E, XC9500XV, XC3100A Discontinuance 12/Apr/2010 |
| 標準包裝： | 24 |
| 系列： | XC3000A/L |
| LAB/CLB數(shù)： | 484 |
| RAM 位總計： | 94984 |
| 輸入/輸出數(shù)： | 138 |
| 門數(shù)： | 7500 |
| 電源電壓： | 4.25 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 160-BQFP |
| 供應商設備封裝： | 160-PQFP（28x28） |
| 其它名稱： | 122-1085 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
R
November 9, 1998 (Version 3.1)
7-5
XC3000 Series Field Programmable Gate Arrays
7
Improvements in the XC3000A and XC3000L
Families
The XC3000A and XC3000L families offer the following
enhancements over the popular XC3000 family:
The XC3000A and XC3000L families have additional inter-
connect resources to drive the I-inputs of TBUFs driving
horizontal Longlines. The CLB Clock Enable input can be
driven from a second vertical Longline. These two additions
result in more efficient and faster designs when horizontal
Longlines are used for data bussing.
During configuration, the XC3000A and XC3000L devices
check the bit-stream format for stop bits in the appropriate
positions. Any error terminates the configuration and pulls
INIT Low.
When the configuration process is finished and the device
starts up in user mode, the first activation of the outputs is
automatically slew-rate limited. This feature, called Soft
Startup, avoids the potential ground bounce when all
out-puts are turned on simultaneously. After start-up, the
slew rate of the individual outputs is, as in the XC3000 fam-
ily, determined by the individual configuration option.
Improvements in the XC3100A and XC3100L
Families
Based on a more advanced CMOS process, the XC3100A
and XC3100L families are architecturally-identical, perfor-
mance-optimized relatives of the XC3000A and XC3000L
families. While all families are footprint compatible, the
XC3100A family extends achievable system performance
beyond 85 MHz.
XC3100
XC3100A
(XC3195A)
Gate
Capacity
X7068
Functionality
XC3000L
XC3000A
XC3100L
Speed
Figure 1: XC3000 FPGA Families
Product Obsolete or Under Obsolescence
相關PDF資料 |
PDF描述 |
|---|---|
| AMM30DTAD | CONN EDGECARD 60POS R/A .156 SLD |
| ACB105DHLR | CONN EDGECARD 210PS .050 DIP SLD |
| ABB105DHLR | CONN EDGECARD 210PS .050 DIP SLD |
| XC3164A-3TQ144C | IC FPGA 224 CLB'S 144-TQFP |
| HSC60DRYI-S734 | CONN EDGECARD 120PS DIP .100 SLD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XC3195A-3PQ208C | 制造商:Xilinx 功能描述: |
| XC3195A-3PQ208I | 制造商:Xilinx 功能描述: |
| XC3195A-4PC8 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| XC3195A4PC84C | 制造商:XILINX 功能描述:PROGRAMMABLE GATE ARRAY |
| XC3195A-4PC84C | 制造商:Xilinx 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。