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    參數(shù)資料
    型號(hào): XC2S600E-6FG456Q
    廠商: Xilinx Inc
    文件頁數(shù): 91/108頁
    文件大?。?/td> 0K
    描述: IC FPGA SPARTAN-IIE 456FPBGA
    產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
    標(biāo)準(zhǔn)包裝: 60
    系列: Spartan®-IIE
    LAB/CLB數(shù): 3456
    邏輯元件/單元數(shù): 15552
    RAM 位總計(jì): 294912
    輸入/輸出數(shù): 329
    門數(shù): 600000
    電源電壓: 1.71 V ~ 1.89 V
    安裝類型: 表面貼裝
    工作溫度: -40°C ~ 125°C
    封裝/外殼: 456-BBGA
    供應(yīng)商設(shè)備封裝: 456-FBGA
    DS077-4 (v3.0) August 9, 2013
    83
    Product Specification
    Spartan-IIE FPGA Family: Pinout Tables
    R
    — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
    I/O, L#P
    2
    L17
    XC2S100E,
    150E, 200E,
    300E, 600E
    XC2S400E,
    600E
    I/O,
    L29N_Y
    I/O,
    L40N_Y
    I/O, L43P_Y I/O, L43P_Y
    I/O, VREF
    Bank 2,
    L43P
    I/O, VREF
    Bank 2,
    L43P_Y
    I/O, L#N
    2
    K22
    XC2S100E,
    150E, 300E,
    400E
    -
    I/O, L29P_Y I/O, L40P_Y
    I/O, L42N
    I/O,
    L42N_Y
    I/O,
    L42N_Y
    I/O, L42N
    I/O, L#P
    2
    K21
    XC2S300E,
    400E
    -
    I/O, L42P
    I/O, L42P_Y I/O, L42P_Y
    I/O, L42P
    I/O
    2
    K20
    -
    I/O
    I/O (D3)
    2
    K19
    -
    I/O (D3)
    I/O (D3),
    L39N
    I/O (D3)
    I/O, VREF
    Bank 2,
    L#N
    2
    K18
    XC2S100E,
    200E, 400E
    All
    I/O, VREF
    Bank 2,
    L28N_Y
    I/O, VREF
    Bank 2,
    L39P
    I/O, VREF
    Bank 2,
    L41N_Y
    I/O, VREF
    Bank 2,
    L41N
    I/O, VREF
    Bank 2,
    L41N_Y
    I/O, VREF
    Bank 2,
    L41N
    I/O, L#P
    2
    K17
    XC2S100,
    150E, 200E,
    400E
    -
    I/O, L28P_Y
    I/O,
    L38N_Y
    I/O, L41P_Y
    I/O, L41P
    I/O, L41P_Y
    I/O, L41P
    I/O, L#N
    2
    J22
    XC2S150E,
    300E, 600E
    -
    I/O
    I/O, L38P_Y
    I/O, L40N
    I/O,
    L40N_Y
    I/O, L40N
    I/O,
    L40N_Y
    I/O, L#P
    2
    J21
    XC2S300E,
    600E
    -
    I/O, L40P
    I/O, L40P_Y
    I/O, L40P
    I/O, L40P_Y
    I/O, L#N
    2
    J20
    XC2S150E,
    200E, 300E,
    600E
    -
    I/O,
    L37N_Y
    I/O,
    L39N_Y
    I/O,
    L39N_Y
    I/O, L39N
    I/O,
    L39N_Y
    I/O, L#P
    2
    J19
    XC2S100E,
    150E, 200E,
    300E, 600E
    -
    I/O,
    L27N_Y
    I/O, L37P_Y I/O, L39P_Y I/O, L39P_Y
    I/O, L39P
    I/O, L39P_Y
    I/O
    2
    H22
    XC2S100E,
    150E
    -
    I/O, L27P_Y
    I/O,
    L36N_Y
    I/O
    I/O, L#N
    2
    J18
    XC2S150E,
    200E, 300E,
    400E, 600E
    -
    I/O, L36P_Y
    I/O,
    L38N_Y
    I/O,
    L38N_Y
    I/O,
    L38N_Y
    I/O,
    L38N_Y
    I/O, L#P
    2
    J17
    XC2S200E,
    300E, 400E,
    600E
    -
    I/O, L38P_Y I/O, L38P_Y I/O, L38P_Y I/O, L38P_Y
    I/O, L#N
    2
    H21
    XC2S150E,
    200E, 300E,
    400E, 600E
    -
    I/O
    I/O,
    L35N_Y
    I/O,
    L37N_Y
    I/O,
    L37N_Y
    I/O,
    L37N_Y
    I/O,
    L37N_Y
    I/O (D2),
    L#P
    2
    H20
    XC2S150E,
    200E, 300E,
    400E, 600E
    -
    I/O (D2)
    I/O (D2),
    L35P_Y
    I/O (D2),
    L37P_Y
    I/O (D2),
    L37P_Y
    I/O (D2),
    L37P_Y
    I/O (D2),
    L37P_Y
    I/O (D1),
    L#N
    2
    H19
    XC2S300E,
    400E, 600E
    -
    I/O (D1),
    L26N
    I/O (D1),
    L34N
    I/O (D1),
    L36N
    I/O (D1),
    L36N_Y
    I/O (D1),
    L36N_Y
    I/O (D1),
    L36N_Y
    I/O, VREF
    Bank 2,
    L#P
    2
    H18
    XC2S300E,
    400E, 600E
    All
    I/O, VREF
    Bank 2,
    L26P
    I/O, VREF
    Bank 2,
    L34P
    I/O, VREF
    Bank 2,
    L36P
    I/O, VREF
    Bank 2,
    L36P_Y
    I/O, VREF
    Bank 2,
    L36P_Y
    I/O, VREF
    Bank 2,
    L36P_Y
    I/O
    2
    G22
    -
    I/O
    2
    F22
    -
    I/O
    FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
    Pad Name
    Pin
    LVDS
    Async.
    Output
    Option
    VREF
    Option
    Device-Specific Pinouts: XC2S
    Function
    Bank
    100E
    150E
    200E
    300E
    400E
    600E
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