參數(shù)資料
型號: XC161CS-32F
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16-Bit Single-Chip Microcontroller with C166SV2 Core
中文描述: 16位單片機與C166SV2核心
文件頁數(shù): 38/84頁
文件大?。?/td> 1166K
代理商: XC161CS-32F
XC161-32
Derivatives
Functional Description
Data Sheet
36
V1.0, 2004-11
Figure 6
Block Diagram of GPT1
With its maximum resolution of 2 system clock cycles, the
GPT2 module
provides
precise event control and time measurement. It includes two timers (T5, T6) and a
capture/reload register (CAPREL). Both timers can be clocked with an input clock which
is derived from the CPU clock via a programmable prescaler or with external signals. The
MCA05563
Aux. Timer T2
2
n
:1
T2
Mode
Control
Capture
U/D
Basic Clock
f
GPT
T3CON.BPS1
T3OTL
T3OUT
Toggle
Latch
T2IN
T2EUD
Reload
Core Timer T3
T3
Mode
Control
T3IN
T3EUD
U/D
Interrupt
Request
(T3IRQ)
T4
Mode
Control
U/D
Aux. Timer T4
T4EUD
T4IN
Reload
Capture
Interrupt
Request
(T4IRQ)
Interrupt
Request
(T2IRQ)
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