參數(shù)資料
型號(hào): XA3S700A-4FGG484Q
廠商: Xilinx Inc
文件頁(yè)數(shù): 48/57頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-3A 700K 484-FBGA
產(chǎn)品培訓(xùn)模塊: Extended Spartan 3A FPGA Family
標(biāo)準(zhǔn)包裝: 1
系列: Spartan®-3A XA
LAB/CLB數(shù): 1472
邏輯元件/單元數(shù): 13248
RAM 位總計(jì): 368640
輸入/輸出數(shù): 372
門(mén)數(shù): 700000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 125°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FBGA
XA Spartan-3A Automotive FPGA Family Data Sheet
DS681 (v2.0) April 22, 2011
Product Specification
52
Serial Peripheral Interface Configuration Timing
X-Ref Target - Figure 14
Figure 14: Waveforms for SPI Configuration
Table 51: Timing for SPI Configuration Mode
Symbol
Description
Minimum
Maximum
Units
TCCLK1
Initial CCLK clock period
TCCLKn
CCLK clock period after FPGA loads ConfigRate bitstream option setting
TMINIT
Setup time on VS[2:0] variant-select pins and M[2:0] mode pins before the
rising edge of INIT_B
50
–ns
TINITM
Hold time on VS[2:0] variant-select pins and M[2:0] mode pins after the
rising edge of INIT_B
0
–ns
TCCO
MOSI output valid delay after CCLK falling clock edge
TDCC
Setup time on the DIN data input before CCLK rising clock edge
TCCD
Hold time on the DIN data input after CCLK rising clock edge
T
DH
T
DSU
Command
(msb)
T
V
T
CSS
<1:1:1>
INIT_B
M[2:0]
T
MINIT
T
INITM
DIN
CCLK
(Input)
T
CCLK
n
T
CCLK1
VS[2:0]
(Input)
New ConfigRate active
Mode input pins M[2:0] and variant select input pins VS[2:0] are sampled when INIT_B
goes High. After this point, input values do not matter until DONE goes High, at which
point these pins become user-I/O pins.
<0:0:1>
Pin initially pulled High by internal pull-up resistor if PUDC_B input is Low.
Pin initially high-impedance (Hi-Z) if PUDC_B input is High. External pull-up resistor required on CSO_B.
T
CCLK1
T
MCCL
n
T
MCCH
n
(Input)
Data
CSO_B
MOSI
T
CCO
T
MCCL1
T
MCCH1
T
DCC
T
CCD
(Input)
PROG_B
PUDC_B
(Input)
PUDC_B must be stable before INIT_B goes High and constant throughout the configuration process.
DS681_13_041111
(Open-Drain)
Shaded values indicate specifications on attached SPI Flash PROM.
Command
(msb-1)
相關(guān)PDF資料
PDF描述
25LC080AT-I/ST IC EEPROM 8KBIT 10MHZ 8TSSOP
25LC080AT-I/MS IC EEPROM 8KBIT 10MHZ 8MSOP
25AA080BT-I/ST IC EEPROM 8KBIT 10MHZ 8TSSOP
25AA080BT-I/MS IC EEPROM 8KBIT 10MHZ 8MSOP
25AA080AT-I/ST IC EEPROM 8KBIT 10MHZ 8TSSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XA3SD1800A 制造商:XILINX 制造商全稱:XILINX 功能描述:XA Spartan-3A DSP Automotive FPGA Family Data Sheet
XA3SD1800A-4CSG484I 功能描述:SPARTAN-3ADSP FPGA 1800K 484CSBG RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3SD1800A-4CSG484Q 功能描述:SPARTAN-3ADSP FPGA 1800K 484CSBG RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3SD1800A-4FGG676I 功能描述:SPARTAN-3ADSP FPGA 1800K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XA3SD1800A-4FGG676Q 功能描述:SPARTAN-3ADSP FPGA 1800K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5