
4
FN8221.3
March 8, 2006
DIGITAL INPUT CHARACTERISTICS (SDA, SADDR, CLOCKINVIN, RESET)
VIH
Input HIGH Voltage
2.0
V
VIL
Input LOW Voltage
0.8
V
I
Input leakage current
RESET has a 70k
pullup to VD
±10
nA
Input capacitance
5pF
SCHMITT DIGITAL INPUT CHARACTERISTICS (SCL, VSYNCIN1, VSYNCIN2)
VT+
Low to High Threshold Voltage
1.45
V
VT-
High to Low Threshold Voltage
0.95
V
I
Input leakage current
±10
nA
Input capacitance
5pF
DIGITAL OUTPUT CHARACTERISTICS (DATACLK, DATACLK)
VOH
Output HIGH Voltage, IO = 16mA
2.4
V
VOL
Output LOW Voltage, IO = -16mA
0.4
V
DIGITAL OUTPUT CHARACTERISTICS (RP, GP, BP, RS, GS, BS, HSOUT, VSOUT, HSYNCOUT, VSYNCOUT)
VOH
Output HIGH Voltage, IO = 8mA
2.4
V
VOL
Output LOW Voltage, IO = -8mA
0.4
V
RTRI
Pulldown to GNDD when three-state
RP, GP, BP, RS, GS, BS only
58
k
DIGITAL OUTPUT CHARACTERISTICS (SDA, XTALCLKOUT)
VOH
Output HIGH Voltage, IO = 4mA
XTALCLKOUT only; SDA is open-drain
2.4
V
VOL
Output LOW Voltage, IO = -4mA
0.4
V
POWER SUPPLY REQUIREMENTS
VA
Analog Supply Voltage
3
3.3
3.6
V
VD
Digital Supply Voltage
3
3.3
3.6
V
VX
Crystal Oscillator Supply Voltage
3
3.3
3.6
V
IA
Analog Supply Current
Operating
190
200
mA
ID
Digital Supply Current
Operating (grayscale)
170
180
mA
IX
Crystal Oscillator Supply Current
0.7
2
mA
PD
Total Power Dissipation
Operating (average)
1.2
1.4
W
Power-down Mode
50
80
mW
ΘJA
Thermal Resistance, Junction to Ambient
30
°C/W
AC TIMING CHARACTERISTICS
PLL Jitter
250
450
ps p-p
Sampling Phase Steps
5.6° per step
64
Sampling Phase Tempco
±1
ps/°C
Sampling Phase Differential Nonlinearity
Degrees out of 360°
±3
°
HSYNC Frequency Range
10
150
kHz
fXTAL
Crystal Frequency Range
23
(Note 2)
25
27
MHz
tSETUP
DATA valid before rising edge of DATACLK 15pF DATACLK load, 15pF DATA load
(Note 1)
1.3
ns
Electrical Specifications
Specifications apply for VA = VD = VX = 3.3V, pixel rate = 275MHz, fXTAL = 25MHz, TA = 25°C,
unless otherwise noted (Continued)
SYMBOL
PARAMETER
COMMENT
MIN
TYP
MAX
UNIT
X98027