FN8201.0 April 18, 2005 AC Timing High-Voltage Write Cycle Timing XDCP Timing Note: (4) VCC
參數(shù)資料
型號(hào): X9448WV24I-2.7
廠商: Intersil
文件頁(yè)數(shù): 5/19頁(yè)
文件大?。?/td> 0K
描述: IC DUAL PROG COMP 10K 24TSSOP
標(biāo)準(zhǔn)包裝: 75
系列: XDCP™
接片: 64
電阻(歐姆): 10k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
13
FN8201.0
April 18, 2005
AC Timing
High-Voltage Write Cycle Timing
XDCP Timing
Note:
(4) VCC = 5V/2.7V
Symbol
Parameter
Min.
Max.
Unit
fSCL
Clock frequency
400
kHz
tCYC
Clock cycle time
2500
ns
tHIGH
Clock high time
600
ns
tLOW
Clock low time
1300
ns
tSU:STA
Start setup time
600
ns
tHD:STA
Start hold time
600
ns
tSU:STO
Stop setup time
600
ns
tSU:DAT
SDA data input setup time
100
ns
tHD:DAT(4)
SDA data input hold time
0/30
ns
tR
SCL and SDA rise time
300
ns
tF
SCL and SDA fall time
300
ns
tAA
SCL low to SDA data output valid time
100
900
ns
tDH
SDA Data output hold time
50
ns
TI
Noise suppression time constant at SCL and SDA inputs
50
ns
tBUF
Bus free time (prior to any transmission)
1300
ns
tSU:WPA
WP, A0, A1, A2 and A3 setup time
0
ns
tHD:WPA
WP, A0, A1, A2 and A3 hold time
0
ns
Symbol
Parameter
Typ.
Max.
Unit
tWR
High-voltage write cycle time (store instructions)
5
10
ms
Symbol
Parameter
Min.
Max.
Unit
tWRL
Wiper response time after instruction issued (all load instructions)
10
s
X9448
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