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參數(shù)資料
| 型號(hào)： | X9271TV14ZT1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 22/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP SGL 256TAP 100K 14-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
9
FN8174.3
June 23, 2011
DEVICE DESCRIPTION
Instructions
Five of the eight instructions are three bytes in length.
These instructions are:
–
Read Wiper Counter Register: Read the current
wiper position of the potentiometer.
–
Write Wiper Counter Register: Change current
wiper position of the potentiometer.
–
Read Data Register: Read the contents of the
selected Data Register.
–
Write Data Register: Write a new value to the
selected Data Register.
–
Read Status: This command returns the contents of
the WIP bit, which indicates if the internal write cycle
is in progress.
See Table 8 for details of the instruction set.
The basic sequence of the 3-byte instruction is shown
in Figure 2. These 3-byte instructions exchange data
between the WCR and one of the Data Registers. A
transfer from a Data Register to a WCR is essentially a
write to a static RAM, with the static RAM controlling
the wiper position. The response of the wiper to this
action is delayed by tWRL. A transfer from the WCR
(current wiper position) to a Data Register is a write to
nonvolatile memory and takes a minimum of tWR to
complete. The transfer can occur between one of the
four potentiometers and one of its associated
registers, or it may occur globally, where the transfer
occurs between all potentiometers and one associated
register. The Read Status Register instruction is the
only unique format (Figure 3).
Two instructions require a 2-byte sequence to
complete (Figure 4). These instructions transfer data
between the host and the X9271; either between the
host and one of the data registers, or directly between
the host and the Wiper Counter Register. These
instructions are:
–
XFR Data Register to Wiper Counter Register:
Transfers the contents of one specified Data Regis-
ter to the associated Wiper Counter Register.
–
XFR Wiper Counter Register to Data Register:
Transfers the contents of the specified Wiper Coun-
ter Register to the associated Data Register.
The final command is Increment/Decrement (Figures 5
and 6). It is different from the other commands,
because its length is indeterminate. Once the
command is issued, the master can clock the selected
wiper up and/or down in one resistor segment step,
thereby providing a fine-tuning capability to the host.
For each SCK clock pulse (tHIGH) while SI is HIGH,
the selected wiper moves one resistor segment
towards the RH terminal. Similarly, for each SCK clock
pulse while SI is LOW, the selected wiper moves one
resistor segment towards the RL terminal.
Write-in-Process (WIP) Bit
The contents of the Data Registers are saved to
nonvolatile memory when the CS pin goes from LOW
to HIGH after a complete write sequence is received
by the device. The progress of this internal write
operation can be monitored by the Write-in-Process bit
(WIP). The WIP bit is read with a Read Status
command.
X9271
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|---|---|
| X9271TV-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally-Controlled (XDCP) Potentiometer |
| X9271TVI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally-Controlled (XDCP) Potentiometer |
| X9271TVI-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9271TXXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
| X9271TXXX-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
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