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參數(shù)資料
| 型號(hào)： | X9271TV14ZT1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 19/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP SGL 256TAP 100K 14-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
6
FN8174.3
June 23, 2011
PRINCIPLES OF OPERATION
Device Description
SERIAL INTERFACE
The X9271 supports the SPI interface hardware
conventions. The device is accessed via the SI input
with data clocked in on the rising SCK. CS must be
LOW and the HOLD and WP pins must be HIGH
during the entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
ARRAY DESCRIPTION
The X9271 is composed of a resistor array (Figure 1).
The array contains the equivalent of 255 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (RH and RL
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(RW) output. Within each individual array, only one
switch may be turned on at a time.
These switches are controlled by a Wiper Counter
Register (WCR). The eight bits of the WCR
(WCR[7:0]) are decoded to select, and enable, one of
256 switches (Table 1).
POWER-UP AND POWER-DOWN RECOMMENDATIONS
There are no restrictions on the power-up or
power-down conditions of VCC and the voltages
applied to the potentiometer pins, provided that VCC is
always more positive than or equal to VH, VL, and VW;
i.e., VCC ≥ VH, VL, VW. The VCC ramp rate
specification is always in effect.
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0
REGISTER 1
REGISTER 2
REGISTER 3
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
COUNTER
REGISTER
INC/DEC
LOGIC
UP/DN
CLK
MODIFIED SCK
UP/DN
RH
RL
RW
8
C
O
U
N
T
E
R
D
E
C
O
D
E
IF WCR = 00[H] THEN RW = RL
IF WCR = FF[H] THEN RW = RH
WIPER
(WCR)
BANK_0 Only
(DR0)
(DR1)
(DR2)
(DR3)
FIGURE 1. DETAILED POTENTIOMETER BLOCK DIAGRAM
X9271
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9271TV-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally-Controlled (XDCP) Potentiometer |
| X9271TVI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally-Controlled (XDCP) Potentiometer |
| X9271TVI-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9271TXXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
| X9271TXXX-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
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