FN8174.3 June 23, 2011 X9271 Package Outline Drawing M14.173 14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 3, 10/09 DETAIL "" />
參數(shù)資料
型號(hào): X9271TV14ZT1
廠商: Intersil
文件頁(yè)數(shù): 15/22頁(yè)
文件大?。?/td> 0K
描述: IC XDCP SGL 256TAP 100K 14-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: XDCP™
接片: 256
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: 6 線 SPI(芯片選擇,設(shè)備位址)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
22
FN8174.3
June 23, 2011
X9271
Package Outline Drawing
M14.173
14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 3, 10/09
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
B
A
17
8
14
C
PLANE
SEATING
0.10 C
0.10
CBA
H
PIN #1
I.D. MARK
5.00 ±0.10
4.40 ±0.10
0.25 +0.05/-0.06
6.40
0.20 C B A
0.05
0°-8°
GAUGE
PLANE
SEE
0.90 +0.15/-0.10
0.60 ±0.15
0.09-0.20
5
2
3
1
3
1.00 REF
0.65
1.20 MAX
0.25
0.05 MIN
0.15 MAX
(1.45)
(5.65)
(0.65 TYP)
(0.35 TYP)
DETAIL "X"
1. Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.80mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead is 0.07mm.
6. Dimension in ( ) are for reference only.
7. Conforms to JEDEC MO-153, variation AB-1.
NOTES:
END VIEW
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