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參數(shù)資料
| 型號(hào)： | X80010Q32I |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Penta-Power Sequence Controller with Hot swap and System Management |
| 中文描述： | 5-CHANNEL POWER SUPPLY SUPPORT CKT, QCC32 |
| 封裝： | 7 X 7 MM, 0.65 MM PITCH, QFN-32 |
| 文件頁數(shù)： | 4/25頁 |
| 文件大小： | 548K |
| 代理商： | X80010Q32I |
4
FN8149.0
January 13, 2005
V
OL
Output LOW Voltage
(RESET, RESET, V1GOOD, V2GOOD,
V3GOOD, V4GOOD, FAR, PWRGD)
I
OL
= 4.0mA
(V
EE
+ 2.7 to V
EE
+ 5.5V)
I
OL
= 2.0mA
(V
EE
+ 2.7 to V
EE
+ 3.6V)
V
EE
+ 0.4
V
C
OUT(1)
Output Capacitance
(RESET, V1GOOD, V2GOOD, V3GOOD,
V4GOOD, FAR)
V
OUT
= 0V
8
pF
C
IN(1)
Input Capacitance (MRH, MRC)
V
IN
= 0V
6
pF
V
OC
Over-current threshold
V
OC
= V
SENSE
- V
EE
45
50
55
mV
V
OCI
Over-current threshold (Insertion)
V
OC
= V
SENSE
- V
EE
PWRGD = HIGH
Initial Power Up condition
135
150
165
mV
V
OVR
Overvoltage threshold (rising)
X80010, X80012
X80011, X80013
Referenced to V
EE
3.85
3.49
3.90
3.54
3.95
3.59
V
V
OVH
Overvoltage hysteresis
Referenced to V
EE
12
18
24
mV
V
UV1H
Undervoltage 1 hysteresis
Referenced to V
EE
BATT-ON = V
EE
12
18
24
mV
V
UV1F
Undervoltage 1 threshold (falling)
2.16
2.21
2.26
V
V
UV2H
Undervoltage 2 hysteresis
Referenced to V
EE
BATT-ON = V
RGO
12
18
24
mV
V
UV2F
Undervoltage 2 threshold (falling)
1.68
1.73
1.78
V
V
DRAINF
Drain sense voltage threshold
(falling)
Referenced to V
EE
0.9
1
1.1
V
V
DRAINR
Drain sense voltage threshold
(rising)
Referenced to V
EE
1.2
1.3
1.4
V
V
TRIP1
EN1 Trip Point Voltage
Referenced to V
EE
2.25
2.5
2.75
V
V
TRIP2
EN2 Trip Point Voltage
Referenced to V
EE
2.25
2.5
2.75
V
V
TRIP3
EN3 Trip Point Voltage
Referenced to V
EE
2.25
2.5
2.75
V
V
TRIP4
EN4 Trip Point Voltage
Referenced to V
EE
2.25
2.5
2.75
V
AC CHARACTERISTICS
t
FOC
Sense High to Gate Low
1.5
2.5
3.5
μ
s
t
FUV
Under Voltage conditions to Gate Low
0.5
1.0
1.5
μ
s
t
FOV
Overvoltage Conditions to Gate Low
1.0
1.5
2
μ
s
t
VFR
Overvoltage/undervoltage failure recovery time
to Gate =1V.
V
DD
does not drop below 3V, No
other failure conditions.
1.2
1.6
2
μ
s
t
BATT_ON
Delay BATT_ON Valid
100
ns
t
MRC
Minimum time high for reset valid on the MRC
pin
5
μ
s
t
MRH
Minimum time high for reset valid on the MRH
pin
5
μ
s
t
MRCE
Delay from MRC enable to PWRGD HIGH
No Load
1.0
1.6
μ
s
t
MRCD
Delay from MRC disable to PWRGD LOW
Gate is On, No Load
200
400
μ
s
t
MRHE
Delay from MRH enable to Gate Pin LOW
I
GATE
= 60μA, No Load
1.0
1.6
2.4
μ
s
t
MRHD
Delay from MRH disable to GATE reaching 1V
I
GATE
= 60μA, No Load
1.8
2.6
μ
s
Electrical Specifications
(Standard Settings)
Over the recommended operating conditions unless otherwise specified.
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
X80010, X80011, X80012, X80013
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X80013Q32I | Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; Contact Termination:IDC; No. of Ports:3 RoHS Compliant: Yes |
| X80011Q32I | Penta-Power Sequence Controller with Hot swap and System Management |
| X80010 | Penta-Power Sequence Controller with Hot swap and System Management |
| X80011 | Penta-Power Sequence Controller with Hot swap and System Management |
| X80012 | Penta-Power Sequence Controller with Hot swap and System Management |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X80011 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
| X80011Q32I | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
| X80012 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
| X80012Q32I | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
| X80013 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
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