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參數資料
| 型號： | X80010Q32I |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Penta-Power Sequence Controller with Hot swap and System Management |
| 中文描述： | 5-CHANNEL POWER SUPPLY SUPPORT CKT, QCC32 |
| 封裝： | 7 X 7 MM, 0.65 MM PITCH, QFN-32 |
| 文件頁數： | 20/25頁 |
| 文件大小： | 548K |
| 代理商： | X80010Q32I |
20
FN8149.0
January 13, 2005
Manual Reset (Hot Side and Cold Side)
The manual reset option allows a hardware reset of either
the Gate control or the PWRGD indicator. These can be
used to recover the system in the event of an abnormal
operating condition.The X80010 has two manual reset pins:
MRH (manual reset hot side) and MRC (manual reset cold
side). The MRH signal is used as a manual reset for the
GATE pin. This pin is used to initiate Soft Reinsert. When
MRH is pulled LOW the GATE pin will be pulled LOW. It also
clears the FAR signal. When the MRH pin goes HIGH, it
removes the override signal and the gate will turn on based
on the selected gate control mechanism.
The MRC signal is used as a manual reset for the PWRGD
signal. This pin is used to initiate a Soft Restart. When the
MRC is pulled HIGH, the PWRGD signal is pulled HIGH.
When MRC pin goes LOW, the PWRGD pin goes
operational. It will go LOW if all constraints on the GATE are
within limits.
Flexible Power Sequencing of Multiple Power
Supplies
The X80010 provides several circuits such as multiple
voltage enable pins, programmable delays, and a power
good signals can be used to set up flexible power
sequencing schemes for downstream DC/DC supplies.
Below are examples of parallel and relay sequencing.
1. Power Up of DC/DC Supplies In Parallel Sequencing
Using Programmable Delays on Power Good (See Figure
41 and Figure 42).
Several DC/DC power supplies and their respective
power up start times can be controlled using the X80010
such that each of the DC/DC power supplies will start up
following the issue of the PWRGD signal. The PWRGD
signal is fed into the ENi inputs to the X80010. When
PWRGD is valid, the internal voltage enable circuits issue
ViGOOD signals after a time delay. The ViGOOD signals
control the ON/OFF pins of the DC/DC supplies. Each
DC/DC converter is instructed to turn on 100ms after the
PWRGD goes active. However, each ViGOOD delay can
be increased with the use of external R-C circuits.
TABLE 3. MANUAL RESET OF THE HOT SIDE (GATE SIGNAL)
MRH
GATE PIN
REQUIREMENTS
1
Operational When MRH is HIGH the Manual Reset
(Hot) function is disabled
0
OFF
MRH must be held LOW minimum of 5
μ
s
TABLE 4. MANUAL RESET OF THE COLD SIDE (PWRGD
SIGNAL)
MRC
PWRGD
REQUIREMENTS
1
HIGH
MRC must be held HIGH minimum of 5
μ
s
0
Operational
When MRC is LOW the MRC
function is disabled
X80010, X80011, X80012, X80013
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相關代理商/技術參數 |
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|---|---|
| X80011 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
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| X80012 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
| X80012Q32I | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
| X80013 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Penta-Power Sequence Controller with Hot swap and System Management |
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