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參數(shù)資料
| 型號(hào)： | X76F641XG-2.0 |
| 廠商： | IC MICROSYSTEMS Sdn. Bhd. |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 13/17頁 |
| 文件大小： | 167K |
| 代理商： | X76F641XG-2.0 |
X76F641
13
RESET AC SPECIFICATIONS
Power Up Timing
Notes:
1.
Delays are measured from the time V
CC
is stable until the specified operation can be initiated. These parameters are periodically
sampled and not 100% tested.
2. Typical values are for T
A
= 25C and V
CC
= 5.0V
Nonvolatile Write Cycle Timing
Notes:
1.
t
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
TIMING DIAGRAMS
Bus Timing
Write Cycle Timing
Symbol
Parameter
Min.
Typ
(2)
Max.
Units
t
PUR
(1)
Time from Power Up to Read
1
mS
t
PUW
(1)
Time from Power Up to Write
5
mS
Symbol
Parameter
Min.
Typ.(1)
Max.
Units
t
WC
(1)
Write Cycle Time
5
10
mS
t
SU:STO
t
DH
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA OUT
t
F
t
LOW
t
BUF
t
AA
t
R
7025 FM 18
SCL
SDA
t
WC
8th bit of last byte
ACK
Stop
Condition
Start
Condition
7025 FM 19
7025 FM T11
7025 FM T12
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