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| 型號(hào)： | X40235 |
| 英文描述： | Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器) |
| 中文描述： | 綜合系統(tǒng)管理IC三電壓監(jiān)測(cè)器，葡萄牙，2千比特的EEPROM內(nèi)存，單/雙副處長（帶2K的EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器） |
| 文件頁數(shù)： | 5/39頁 |
| 文件大小： | 215K |
| 代理商： | X40235 |
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X4023x
– Preliminary Information
Characteristics subject to change without notice.
5 of 39
REV 1.0.4 7/12/01
www.xicor.com
X40235 PIN ASSIGNMENT
SOIC
Name
Function
1
R
H2
R
W2
Connection to end of resistor array for (the 256 Tap) DCP.
2
Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP.
3
V3MON
V3MON Voltage Monitor Input.
V3MON is the input to a non-inverting voltage comparator circuit. When the V3MON input is higher
than the V
TRIP3
threshold voltage, V3FAIL makes a transition to a HIGH level. Connect V3MON to V
SS
when not used.
V3MON RESET Output.
This open drain output makes a transition to a HIGH level when V3MON is greater than V
TRIP3
and
goes LOW when V3MON is less than VTRIP3. There is no delay circuitry on this pin. The V3FAIL pin
requires the use of an external “pull-up” resistor.
Manual Reset.
MR is a TTL level compatible input. Pulling the MR pin active (HIGH) initiates a reset cycle to the
RESET pin (V
CC
RESET Output pin). RESET will remain HIGH for time t
PURST
after MR has returned
to it’s normally LOW state. The reset time can be selected using bits PUP1 and PUP0 in the CR
Register. The MR pin requires the use of an external “pull-down” resistor.
Write Protect Control Pin.
WP pin is a TTL level compatible input. When held HIGH, Write Protection is enabled. In the enabled
state, this pin prevents all nonvolatile “write” operations. Also, when the Write Protection is enabled,
and the device Block Lock feature is active (i.e. the Block Lock bits are NOT [0,0]), then no “write”
(volatile or nonvolatile) operations can be performed in the device (including the wiper position of any
of the integrated Digitally Controlled Potentiometers (DCPs). The WP pin uses an internal “pull-down”
resistor, thus if left floating the write protection feature is disabled.
Serial Clock.
This is a TTL level compatible input pin used to control the serial bus timing for data input and output.
Serial Data.
SDA is a bidirectional TTL level compatible pin used to transfer data into and out of the device. The
SDA pin input buffer is always active (not gated). This pin requires an external pull up resistor.
Ground
.
No Connect
No Connect
No Connect
V2MON Voltage Monitor Input.
V2MON is the input to a non-inverting voltage comparator circuit. When the V2MON input is greater
than the V
TRIP2
threshold voltage, V2FAIL makes a transition to a HIGH level. Connect V2MON to V
SS
when not used.
V2MON RESET Output.
This open drain output makes a transition to a HIGH level when V2MON is greater than V
TRIP2
, and
goes LOW when V2MON is less than V
TRIP2
. There is no power up reset delay circuitry on this pin.
The V2FAIL pin requires the use of an external “pull-up” resistor.
V
CC
RESET Output.
This is an active HIGH, open drain output which becomes active whenever V
CC
falls below V
TRIP1
.
RESET becomes active on power up and remains active for a time t
PURST
after the power supply
stabilizes (t
PURST
can be changed by varying the PUP0 and PUP1 bits of the internal control register).
The RESET pin requires the use of an external “pull-up” resistor. The RESET pin can be forced active
(HIGH) using the manual reset (MR) input pin.
4
V3FAIL
5
MR
6
WP
7
SCL
8
SDA
9
VSS
10
NC
11
NC
12
NC
13
V2MON
14
V2FAIL
15
RESET
16
V
CC
Supply Voltage.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X40237 | Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器) |
| X40239 | Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器) |
| x40410(中文) | 4kbit EEPROM Dual Voltage Monitor with Integrated CPU Supervisor(4K位EEPROM 雙電壓監(jiān)測(cè)的CPU監(jiān)控器) |
| X40420(中文) | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421(中文) | Dual Voltage Monitor with Intergrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40235S16I-A | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40235S16I-AT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40235S16I-B | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40235S16I-BT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40237 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
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