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參數(shù)資料
| 型號： | WEDPNF8M722V-1010BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA275 |
| 封裝： | 32 X 25 MM, PLASTIC, BGA-275 |
| 文件頁數(shù)： | 19/43頁 |
| 文件大?。?/td> | 1280K |
| 代理商： | WEDPNF8M722V-1010BI |
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White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WEDPNF8M722V-XBX
DATA POLLING ALGORITHM
1. FD7/FD23 should be rechecked even if FD5/FD21 = 1 because FD7/
FD23 may change simultaneously with FD5/FD21 respectively.
VA = Byte address for programming
= Any of the sector addresses within the
sector being erased during sector erase operation
= Valid address equals any non-protected
sector group address during chip erase
FIG. 8
WRITE OPERATION STATUS
The device provides several bits to determine the status of
a write operation: FD2, FD3, FD5, FD6, and FD7 and FD18,
FD19, FD21, FD22 and FD23 respectively. Table 8 and the
following subsections describe the functions of these bits.
FD7, RY/BY1, and FD6 and FD23, RY/BY2, FD22 respectively
each offer a method for determining whether a program or
erase operation is complete or in progress. These bits are
discussed first.
FD7/FD23: DATA POLLING
The Data Polling bit, FD7, indicates to the host system
whether an Embedded Algorithm is in progress or com-
pleted, or whether the device is in Erase Suspend Data
Polling valid after the rising edge of the final FWE pulse in
the program or erase command sequence.
During the Embedded Program algorithm, the device out-
puts on FD7/FD23 the complement of the datum pro-
grammed to FD7/FD23. This FD7/FD23 status also applies to
programming during Erase Suspend. When the Embedded
Program algorithm is complete, the device outputs the da-
tum programmed to FD7/FD23. The system must provide
the program address to read valid status information on
FD7/FD23. If a program address falls within a protected sec-
tor, Data Polling on FD/FD237 is active for approximately 1s,
then the device returns to reading array data.
During the Embedded Erase algorithm, Data Polling pro-
duces a “0” on FD7/FD23. When the Embedded Erase al-
gorithm is complete, or if the device enters the Erase Sus-
pend mode, Data Polling produces a “1” on FD7/FD23. This
analogous to the complement/true datum output described
for the Embedded Program algorithm: the erase function
changes all the bits in a sector to “1”; prior to this, the de-
vice outputs the “complement,” or “0.” The system must
provide an address within any of the sectors selected for
erasure to read valid status information on FD7/FD23.
After an erase command sequence is written, if all sectors
selected for erasing are protected, Data Polling on FD7/FD23
is active for approximately 100s, then the device returns
to reading array data. If not all selected sectors are pro-
tected, the Embedded Erase algorithm erases the unpro-
tected sectors, and ignores the selected sectors that are
protected.
When the system detects FD7 has changed from the
complement to true data, it can read valid data at FD7-0
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相關(guān)代理商/技術(shù)參數(shù) |
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| WEDPNF8M722V-1010BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1012BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1012BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1012BM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M722V-1015BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8Mx72 Synchronous DRAM + 16Mb Flash Mixed Module Multi-Chip Package |
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