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參數(shù)資料
| 型號： | WEDPF2M64B-70BM3 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | PROM |
| 英文描述： | 2M X 64 FLASH 3.3V PROM MODULE, 70 ns, PBGA119 |
| 封裝： | STACKED TSOP, BGA-119 |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 317K |
| 代理商： | WEDPF2M64B-70BM3 |
10
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPF2M64-XBX3
FIG 9: BACK TO BACK READ/WRITE CYCLE TIMINGS
tAH
Addresses
Valid PA
Valid RA
Valid PA
Valid In
Valid Out
Valid In
tWC
tRC
tWC
CE
OE
WE
Data
tACC
tCE
tCPH
tCP
tWP
tOEH
tGHWL
tWPH
tDS
tDH
tOH
tDF
tOE
WE Controlled Write Cycle
Read Cycle
CE Controlled Write Cycle
tSW/W
wedpf2m64fig20.eps
NOTE: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle.
FIG. 10: DATA POLLING TIMINGS (DURING EMBEDDED ALGORITHMS)
Addresses
VA
tRC
CS
Complement
True
DQ0-DQ6
tACC
tCE
tCH
tOE
OE
WE
tOEH
tDF
tOH
Valid Data
High Z
Status Data
True
Valid Data
High Z
RY/BY
tBUSY
wedpf2m64fig10.eps
CS
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