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參數(shù)資料
| 型號(hào)： | W987Z6CBG80 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 |
| 封裝： | 8 X 9 MM, 1.20 MM HEIGHT, FBGA-54 |
| 文件頁數(shù)： | 10/46頁 |
| 文件大?。?/td> | 1634K |
| 代理商： | W987Z6CBG80 |
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Preliminary W987Z6CB
- 18 -
Address sequence of Sequential mode
A column access is performed by incrementing the column address input to the device. The
address is varied by the Burst Length as the following.
Addressing Sequence of Sequential Mode
DATA
ACCESS ADDRESS
BURST LENGTH
Data 0
n
2 words (address bits is A0)
Data 1
n + 1
No carried from A0 to A1
Data 2
n + 2
4 words (address bit A0, A1)
Data 3
n + 3
Not carried from A1 to A2
Data 4
n + 4
Data 5
n + 5
8 words(address bits A2, A1 and A0)
Data 6
n + 6
Not carried from A2 to A3
Data 7
n + 7
Addressing sequence of Interleave mode
A Column access is started from the inputted column address and is performed by
interleaving the address bits in the sequence shown as the following.
Address Sequence for Interleave Mode
DATA
ACCESS ADDRESS
BURST LENGTH
Data 0
A8 A7 A6 A5 A4 A3 A2 A1 A0
2 words
Data 1
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 2
A8 A7 A6 A5 A4 A3 A2 A1 A0
4 words
Data 3
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 4
A8 A7 A6 A5 A4 A3 A2 A1 A0
8 words
Data 5
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 6
A8 A7 A6 A5 A4 A3 A2 A1 A0
Data 7
A8 A7 A6 A5 A4 A3 A2 A1 A0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W987Z6CBN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM |
| W988D2FB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256Mb Mobile LPSDR |
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| W988D2FBJX6I | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256Mb Mobile LPSDR |
| W988D2FBJX7E | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 256MBIT 90VFBGA |
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