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VITESSE
Preliminary Data Sheet
VSC837
3.2Gb/s
68x68 Crosspoint Switch
G52309-0, Rev 3.0
02/16/01
Page 19
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
YN65
YN66
YN67
AC5
AC25
AC1
High-Speed Data Output Channel 65, Complement
High-Speed Data Output Channel 66, Complement
High-Speed Data Output Channel 67, Complement
CML
CML
CML
Control Pins
ACTCLK
ACTIVITY
AD2
AD1
Clock for Activity Monitor (<10MHz)
ActivityResult from Previous ACTCLK Period
Address Latch Enable for Multiplexed Parallel Mode; Scan Enable for Serial
Mode. See Figures 2 through 6 for Proper Use.
Logic HIGH sets Burst Mode
Output Drive Current Control (leave floating)
Logic HIGH Transfers Programming to Main Program Memory
Chip Select (active LOW)
Output Drive Current Switch (LOW = 10mA, HIGH = 20mA)
Input Channel, Bit 0 and Serial Data in Serial Mode
Input Channel, Bit 1 and Serial Clock in Serial Mode
Input Channel, Bit 2
Input Channel, Bit 3
Input Channel, Bit 4
Input Channel, Bit 5
Input Channel, Bit 6
INITB=0 Forces
“
Straight-Through
”
Program
Input Termination Control (GND = floating input termination,
V
CC
= CML mode. See Table 7).
Rising Edge Writes Data in Parallel and Burst Modes,
See Figure 5 for Serial Mode
Output Channel, Bit 0
Output Channel, Bit 1
Output Channel, Bit 2
Output Channel, Bit 3
Output Channel, Bit 4
Output Channel, Bit 5
Output Channel, Bit 6
Output Channel, Bit 7 (burst mode only)
Output Channel, Bit 8 (burst mode only)
Output Channel, Bit 9 (burst mode only)
Output Channel, Bit 10 (burst mode only)
Output Channel, Bit 11 (burst mode only)
Output Channel, Bit 12 (burst mode only)
Output Channel, Bit 13 (burst mode only)
TTL
TTL
ALE_SCN
AD25
TTL
BURST
CMV
CONFIG
CSB
DRIVE_CTRL
INCHAN0_SDIN
INCHAN1_SCLK
INCHAN2
INCHAN3
INCHAN4
INCHAN5
INCHAN6
INITB
AH6
AD3
F27
AF6
AD4
AG24
AF24
AE24
AH24
AJ24
AD27
AD26
AJ6
TTL
ANALOG
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ITC
AD29
ANALOG
LOAD
AD28
TTL
OUTCHAN0
OUTCHAN1
OUTCHAN2
OUTCHAN3
OUTCHAN4
OUTCHAN5
OUTCHAN6
OUTCHAN7
OUTCHAN8
OUTCHAN9
OUTCHAN10
OUTCHAN11
OUTCHAN12
OUTCHAN13
F1
F2
F5
F4
F3
A6
B6
E6
D6
C6
A24
B24
E24
D24
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Signal Name
Pin
Function
Level