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參數(shù)資料
| 型號： | V62C3184096L-55T |
| 廠商： | MOSEL-VITELIC |
| 元件分類： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 55 ns, PDSO32 |
| 封裝： | TSOP-32 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 52K |
| 代理商： | V62C3184096L-55T |
4
V62C3184096 Rev. 1.1 June 2000
MOSEL V ITELIC
V62C3184096
DC Electrical Characteristics
(over all temperature ranges, V
CC
= 2.7V
–
3.3V)
NOTES:
1.
2.
3.
These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.
V
IL
(Min.) = -3.0V for pulse width < t
RC
/2.
Maximum value.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
V
IL
Input LOW Voltage
(1,2)
-0.5
—
0.4
V
V
IH
Input HIGH Voltage
(1)
2.0
—
V
CC
+0.3
V
I
IL
Input Leakage Current
V
CC
= Max, V
IN
= 0V to V
CC
—
—
1
μ
A
I
OL
Output Leakage Current
V
CC
= Max, CE
1
= V
IH
, V
OUT
= 0V to V
CC
—
—
1
μ
A
V
OL
Output LOW Voltage
V
CC
= Min, I
OL
= 2mA
—
—
0.4
V
V
OH
Output HIGH Voltage
V
CC
= Min, I
OH
= -0.5mA
V
CC
–
0.4
—
—
V
Symbol
Parameter
Comm.
(3)
Ind.
(3)
Units
I
CC1
Average Operating Current, CE
V
CC
= Max.
1
= V
IL
, CE
2
= V
CC
–
0.2, Output Open,
f = fmax
35
40
mA
f = 1 MHz
4
5
I
SB
TTL Standby Current
CE
1
≥
V
IH
, CE
2
≤
V
IL
, V
CC
= Max., f = 0
L
0.5
1
mA
LL
0.3
1
I
SB1
CMOS Standby Current, CE
V
IN
≥
V
CC
–
0.2V or V
IN
≤
0.2V, V
CC
= Max., f = 0
1
≥
V
CC
–
0.2V, CE
2
≤
0.2V,
L
10
15
μ
A
LL
5
7
AC Test Conditions
AC Test Loads and Waveforms
Input Pulse Levels
0 to 2.0V
Input Rise and Fall Times
5 ns
Timing Reference Levels
1.1V
Output Load
see below
* Includes scope and jig capacitance
C
L
= 30pF + 1TTL Load
C
L
*
TTL
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